High-throughput CAVLC architecture for real-time H.264 coding using reconfigurable devices

One of the encoding methods offered by H.264 AVC is context-based adaptive variable length coding (CAVLC). This paper presents a high-throughput hardware implementation of the CAVLC encoder. A dual-coefficient scanning phase is investigated and modified to improve the speed of the encoding phase. Th...

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Veröffentlicht in:Journal of real-time image processing Jg. 11; H. 1; S. 75 - 82
Hauptverfasser: Hoffman, Marc P., Balster, Eric J., Turri, William F.
Format: Journal Article
Sprache:Englisch
Veröffentlicht: Berlin/Heidelberg Springer Berlin Heidelberg 01.01.2016
Springer Nature B.V
Schlagworte:
Codes
Coding
Computer Graphics
Computer Science
Hardware
Image Processing and Computer Vision
Multimedia Information Systems
Original Research Paper
Pattern Recognition
Signal,Image and Speech Processing
Variables
Video compression
Real-time processing
Field Programmable Gate Array (FPGA)
Context-based adaptive variable length coding (CAVLC)
Entropy encoding
H.264/AVC
ISSN:1861-8200, 1861-8219
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Zusammenfassung:One of the encoding methods offered by H.264 AVC is context-based adaptive variable length coding (CAVLC). This paper presents a high-throughput hardware implementation of the CAVLC encoder. A dual-coefficient scanning phase is investigated and modified to improve the speed of the encoding phase. This improved scanning solution determines all the required data for the encoding phase to be completed in a minimized and constant number of clock cycles. In addition, an algorithmic approach for encoding levels is exploited to reduce hardware resource requirements. The modified scanning phase approach offers significant throughput capabilities for CAVLC: at 200 MHz, the architecture is capable of encoding 1,080 p video files at 95 fps.
Bibliographie:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ISSN:1861-8200
1861-8219
DOI:10.1007/s11554-013-0345-2