An optimizing technique for using MATLAB HDL coder
Background MathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick proof of concept on the one hand and providing the g an easy-to-use platform for testing and verification on the other. It has main drawbacks over thes...
Uloženo v:
| Vydáno v: | Bulletin of the National Research Centre Ročník 47; číslo 1; s. 94 - 8 |
|---|---|
| Hlavní autoři: | , |
| Médium: | Journal Article |
| Jazyk: | angličtina |
| Vydáno: |
Berlin/Heidelberg
Springer Berlin Heidelberg
01.12.2023
Springer Nature B.V SpringerOpen |
| Témata: | |
| ISSN: | 2522-8307, 2522-8307 |
| On-line přístup: | Získat plný text |
| Tagy: |
Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
|
| Abstract | Background
MathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick proof of concept on the one hand and providing the g an easy-to-use platform for testing and verification on the other. It has main drawbacks over these advantages; it generates a code that is not optimized for both area and frequency.
Results
In this paper, we provide a technique for optimizing both area and frequency without losing the main advantages. The most affecting problem we found is loops. This paper classifies loop writing purposes into two types. The first one is preferable and introduces ease of writing a few lines instead of repeating the code. The second type is the problem that we intended to solve. Type II loop is appearing when the algorithm should perform these lines for several clock cycles. Writing it traditionally, force the synthesizer to implement all the repetitive clock cycles as repetitive hardware to be done in one clock cycle. This clock cycle is wide in time and is slow in frequency. This paper introduces an optimization technique for this problem. We compare before and after the implementation of our proposed technique.
Conclusions
We used Xilinx Spartan 6 XC6SLX4-2CPG196 FPGA. Our proposed technique improves the number of slice LUTs (Look Up Tables) requirement from 366 to 72%. The frequency improved from: 26.574 to 185.355 MHz. Based on that, we now recommend using MATLAB HDL coder in FPGA Design. |
|---|---|
| AbstractList | BackgroundMathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick proof of concept on the one hand and providing the g an easy-to-use platform for testing and verification on the other. It has main drawbacks over these advantages; it generates a code that is not optimized for both area and frequency.ResultsIn this paper, we provide a technique for optimizing both area and frequency without losing the main advantages. The most affecting problem we found is loops. This paper classifies loop writing purposes into two types. The first one is preferable and introduces ease of writing a few lines instead of repeating the code. The second type is the problem that we intended to solve. Type II loop is appearing when the algorithm should perform these lines for several clock cycles. Writing it traditionally, force the synthesizer to implement all the repetitive clock cycles as repetitive hardware to be done in one clock cycle. This clock cycle is wide in time and is slow in frequency. This paper introduces an optimization technique for this problem. We compare before and after the implementation of our proposed technique.ConclusionsWe used Xilinx Spartan 6 XC6SLX4-2CPG196 FPGA. Our proposed technique improves the number of slice LUTs (Look Up Tables) requirement from 366 to 72%. The frequency improved from: 26.574 to 185.355 MHz. Based on that, we now recommend using MATLAB HDL coder in FPGA Design. Abstract Background MathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick proof of concept on the one hand and providing the g an easy-to-use platform for testing and verification on the other. It has main drawbacks over these advantages; it generates a code that is not optimized for both area and frequency. Results In this paper, we provide a technique for optimizing both area and frequency without losing the main advantages. The most affecting problem we found is loops. This paper classifies loop writing purposes into two types. The first one is preferable and introduces ease of writing a few lines instead of repeating the code. The second type is the problem that we intended to solve. Type II loop is appearing when the algorithm should perform these lines for several clock cycles. Writing it traditionally, force the synthesizer to implement all the repetitive clock cycles as repetitive hardware to be done in one clock cycle. This clock cycle is wide in time and is slow in frequency. This paper introduces an optimization technique for this problem. We compare before and after the implementation of our proposed technique. Conclusions We used Xilinx Spartan 6 XC6SLX4-2CPG196 FPGA. Our proposed technique improves the number of slice LUTs (Look Up Tables) requirement from 366 to 72%. The frequency improved from: 26.574 to 185.355 MHz. Based on that, we now recommend using MATLAB HDL coder in FPGA Design. Background MathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick proof of concept on the one hand and providing the g an easy-to-use platform for testing and verification on the other. It has main drawbacks over these advantages; it generates a code that is not optimized for both area and frequency. Results In this paper, we provide a technique for optimizing both area and frequency without losing the main advantages. The most affecting problem we found is loops. This paper classifies loop writing purposes into two types. The first one is preferable and introduces ease of writing a few lines instead of repeating the code. The second type is the problem that we intended to solve. Type II loop is appearing when the algorithm should perform these lines for several clock cycles. Writing it traditionally, force the synthesizer to implement all the repetitive clock cycles as repetitive hardware to be done in one clock cycle. This clock cycle is wide in time and is slow in frequency. This paper introduces an optimization technique for this problem. We compare before and after the implementation of our proposed technique. Conclusions We used Xilinx Spartan 6 XC6SLX4-2CPG196 FPGA. Our proposed technique improves the number of slice LUTs (Look Up Tables) requirement from 366 to 72%. The frequency improved from: 26.574 to 185.355 MHz. Based on that, we now recommend using MATLAB HDL coder in FPGA Design. |
| ArticleNumber | 94 |
| Author | Kayed, Somaya Elsayed, Ghada |
| Author_xml | – sequence: 1 givenname: Somaya surname: Kayed fullname: Kayed, Somaya organization: Electrical Department, Obour High Institute for Engineering and Technology – sequence: 2 givenname: Ghada orcidid: 0000-0002-3802-5620 surname: Elsayed fullname: Elsayed, Ghada email: Ghada.farouk@eng.mti.edu.eg organization: Electrical Engineering Department, Modern University for Technology and Information |
| BookMark | eNp9kE9v2zAMxYWiBdpl_QI9GejZK0XJknzMuvUPkGGX9CzIMpUqSK1Ucg7bp59TD9uwQ08kCP4eH98HdjqkgRi74vCJc6NuikRUbQ0oauCgVM1P2AU2iLURoE__6c_ZZSlbAEAuASReMFwOVdqP8SX-jMOmGsk_D_H1QFVIuTqU4-zbcr1afq4evqwqn3rKH9lZcLtCl7_rgj3dfV3fPtSr7_ePt8tV7YXUvG6D4R0ZjQ1IErxvheklUNcEGYzvRCAyoeuV0r3RCoR22Hdtx8E1ShgyYsEeZ90-ua3d5_ji8g-bXLRvg5Q31uUx-h3ZLmgtAxhsnZcdcedAYGOUQnKawE9a17PWPqfpuzLabTrkYbJv0QiuTINCTFs4b_mcSskU_lzlYI9R2zlqO0Vt36K2fILMf5CPoxtjGsbs4u59VMxome4MG8p_Xb1D_QJuS5Gq |
| CitedBy_id | crossref_primary_10_1186_s42269_024_01285_0 crossref_primary_10_1186_s42269_023_01096_9 |
| Cites_doi | 10.1109/FCCM57271.2023.00047 10.1016/j.micpro.2023.104844 10.3390/electronics10080926 10.26076/b311-3847 10.21608/jisse.2022.136645.1056 10.1109/NRSC.2008.4542373 10.1016/j.micpro.2023.104847 10.1007/978-3-031-29857-8_75 10.1063/5.0135017 10.1016/j.micpro.2023.104814 10.2316/J.2023.203-0437 10.1016/j.compeleceng.2023.108620 10.1007/978-981-19-9819-5_25 10.1007/s41870-023-01255-1 |
| ContentType | Journal Article |
| Copyright | The Author(s) 2023 The Author(s) 2023. This work is published under http://creativecommons.org/licenses/by/4.0/ (the “License”). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License. |
| Copyright_xml | – notice: The Author(s) 2023 – notice: The Author(s) 2023. This work is published under http://creativecommons.org/licenses/by/4.0/ (the “License”). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License. |
| DBID | C6C AAYXX CITATION 3V. 7ST 7X7 7XB 8FD 8FI 8FJ 8FK ABUWG AEUYN AFKRA AZQEC BENPR C1K CCPQU DWQXO FR3 FYUFA GHDGH K9. M0S P64 PHGZM PHGZT PIMPY PJZUB PKEHL PPXIY PQEST PQQKQ PQUKI RC3 SOI DOA |
| DOI | 10.1186/s42269-023-01066-1 |
| DatabaseName | Springer Nature OA Free Journals CrossRef ProQuest Central (Corporate) Environment Abstracts Health & Medical Collection ProQuest Central (purchase pre-March 2016) Technology Research Database Hospital Premium Collection Hospital Premium Collection (Alumni Edition) ProQuest Central (Alumni) (purchase pre-March 2016) ProQuest Central (Alumni) ProQuest One Sustainability ProQuest Central UK/Ireland ProQuest Central Essentials ProQuest Central Environmental Sciences and Pollution Management ProQuest One Community College ProQuest Central Korea Engineering Research Database Health Research Premium Collection Health Research Premium Collection (Alumni) ProQuest Health & Medical Complete (Alumni) ProQuest Health & Medical Collection Biotechnology and BioEngineering Abstracts ProQuest Central Premium ProQuest One Academic (New) ProQuest Publicly Available Content Database ProQuest Health & Medical Research Collection ProQuest One Academic Middle East (New) ProQuest One Health & Nursing ProQuest One Academic Eastern Edition (DO NOT USE) ProQuest One Academic (retired) ProQuest One Academic UKI Edition Genetics Abstracts Environment Abstracts DOAJ Directory of Open Access Journals |
| DatabaseTitle | CrossRef Publicly Available Content Database Technology Research Database ProQuest One Academic Middle East (New) ProQuest Central Essentials ProQuest Health & Medical Complete (Alumni) ProQuest Central (Alumni Edition) ProQuest One Community College ProQuest One Health & Nursing Environmental Sciences and Pollution Management ProQuest Central ProQuest One Sustainability ProQuest Health & Medical Research Collection Genetics Abstracts Health Research Premium Collection Health and Medicine Complete (Alumni Edition) ProQuest Central Korea ProQuest Central (New) ProQuest One Academic Eastern Edition ProQuest Hospital Collection Health Research Premium Collection (Alumni) ProQuest Hospital Collection (Alumni) Biotechnology and BioEngineering Abstracts ProQuest Health & Medical Complete ProQuest One Academic UKI Edition Engineering Research Database ProQuest One Academic Environment Abstracts ProQuest One Academic (New) ProQuest Central (Alumni) |
| DatabaseTitleList | Publicly Available Content Database |
| Database_xml | – sequence: 1 dbid: DOA name: DOAJ Directory of Open Access Journals url: https://www.doaj.org/ sourceTypes: Open Website – sequence: 2 dbid: PIMPY name: Publicly Available Content Database url: http://search.proquest.com/publiccontent sourceTypes: Aggregation Database |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering Sciences (General) Agriculture |
| EISSN | 2522-8307 |
| EndPage | 8 |
| ExternalDocumentID | oai_doaj_org_article_bf774f0829ac4be1aa03258662ea7e0c 10_1186_s42269_023_01066_1 |
| GroupedDBID | 0R~ 23N 5GY 7X7 8FI 8FJ AAFWJ AAKKN ABDBF ABEEZ ABUWG ACACY ACUHS ACULB ADBBV AEUYN AFGXO AFKRA AFPKN ALIPV ALMA_UNASSIGNED_HOLDINGS AMKLP BCNDV BENPR C24 C6C CCPQU EBS FYUFA GROUPED_DOAJ HMCUK IAO IGS ISR ITC OK1 P2P PIMPY RSV SOJ UKHRP AAYXX AFFHD CITATION PHGZM PHGZT 3V. 7ST 7XB 8FD 8FK AZQEC C1K DWQXO FR3 K9. P64 PJZUB PKEHL PPXIY PQEST PQQKQ PQUKI RC3 SOI |
| ID | FETCH-LOGICAL-c3471-9f81be872504e31d938d40eb5f4f8cb3fee8fbd667d876037a2db9b10a5638e83 |
| IEDL.DBID | BENPR |
| ISSN | 2522-8307 |
| IngestDate | Fri Oct 03 12:35:11 EDT 2025 Tue Oct 07 13:41:00 EDT 2025 Sat Nov 29 01:57:26 EST 2025 Tue Nov 18 22:15:40 EST 2025 Fri Feb 21 02:42:27 EST 2025 |
| IsDoiOpenAccess | true |
| IsOpenAccess | true |
| IsPeerReviewed | true |
| IsScholarly | true |
| Issue | 1 |
| Keywords | FPGA MATLAB HDL coder AES |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-c3471-9f81be872504e31d938d40eb5f4f8cb3fee8fbd667d876037a2db9b10a5638e83 |
| Notes | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
| ORCID | 0000-0002-3802-5620 |
| OpenAccessLink | https://www.proquest.com/docview/2831685233?pq-origsite=%requestingapplication% |
| PQID | 2831685233 |
| PQPubID | 4402865 |
| PageCount | 8 |
| ParticipantIDs | doaj_primary_oai_doaj_org_article_bf774f0829ac4be1aa03258662ea7e0c proquest_journals_2831685233 crossref_primary_10_1186_s42269_023_01066_1 crossref_citationtrail_10_1186_s42269_023_01066_1 springer_journals_10_1186_s42269_023_01066_1 |
| PublicationCentury | 2000 |
| PublicationDate | 20231201 |
| PublicationDateYYYYMMDD | 2023-12-01 |
| PublicationDate_xml | – month: 12 year: 2023 text: 20231201 day: 01 |
| PublicationDecade | 2020 |
| PublicationPlace | Berlin/Heidelberg |
| PublicationPlace_xml | – name: Berlin/Heidelberg – name: Berlin |
| PublicationTitle | Bulletin of the National Research Centre |
| PublicationTitleAbbrev | Bull Natl Res Cent |
| PublicationYear | 2023 |
| Publisher | Springer Berlin Heidelberg Springer Nature B.V SpringerOpen |
| Publisher_xml | – name: Springer Berlin Heidelberg – name: Springer Nature B.V – name: SpringerOpen |
| References | Digilent: Cmod S6 FPGA Board Reference Manual (2023) https://digilent.com/reference/_media/reference/programmable-logic/cmod-s6/cmods6_rm.pdf Accessed 20 Feb 2023 MATHWORKS Copyright 2011-2015 The MathWorks, Inc: Advanced Encryption System (AES) (2023) https://www.mathworks.com/matlabcentral/mlc-downloads/downloads/submissions/50098/versions/3/previews/mlhdlc_tutorial_comms_aes.m/index.html Accessed 20 Feb 2023 Khudair NA, Shujaa MI, Zghair EM (2023) Iot based image processing filters. In: AIP Conference Proceedings, vol 2591, AIP Publishing LLC, p 020007 Neelima K, Meruva KR, Subhas C (2023) Image fusion using xilinx system generator for mri and ct medical image modalities. In: 2023 International Conference on Emerging Smart Computing and Informatics (ESCI), pp 1– 5 ElsayedGKayedSA comparative study between matlab hdl coder and vhdl for FPGAs design and implementationJ Int Soc Sci Eng202244929810.21608/jisse.2022.136645.1056 Loganathan P, Karthikeyan R (2023) Combination of wavelet transform and sobel operator using xilinx system generator for edge detection in medical plant leaf. In: Computational Vision and Bio-Inspired Computing: Proceedings of ICCVBIC 2022, Springer, pp 333– 341 SemmadABahouraMScalable serial hardware architecture of multilayer perceptron neural network for automatic wheezing detectionMicroprocess Microsyst20239910.1016/j.micpro.2023.104844 SankarDLakshmiSBabuCMathewKRapid prototyping of predictive direct current control in a low-cost fpga using hdl coderInt J Power Energy Syst202343101910.2316/J.2023.203-0437 Bendahane B, Jenkal W, Laaboubi M, Latif R (2023) Hdl coder tool for ecg signal denoising. In: Digital Technologies and Applications: Proceedings of ICDTA’23, Fez, Morocco, Vol 1, pp 753– 760. Springer Wallace NL (2023) Developing firmware for space weather probes 2 using HDL coder. Thesis on Master of Science (MS), Electrical and Computer Engineering Commons, Utah State University, Date of Award 8-2023. https://doi.org/10.26076/b311-3847 ZamiriESanchezAYushkovaMMartínez-GarcíaMSde CastroAComparison of different design alternatives for hardware-in-the-loop of power convertersElectronics202110892610.3390/electronics10080926 Mathworks: Initialize Persistent Variables in MATLAB Functions (2022) https://www.mathworks.com/help/simulink/ug/initialize-persistent-variables.html Accessed 20 Feb 2023 MATHWORKS: Speed and Area Optimization (2022) Improvements through resource sharing, streaming, pipelining, RAM mapping. https://www.mathworks.com/help/hdlcoder/speed-and-area-optimization-1.html Accessed 20 Feb 2023 MathWorks, inc: HDL CoderTM\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$^{\rm TM}$$\end{document} User’s GuideCOPYRIGHT 2012-2015 (2012) https://www.mathworks.com/help/hdlcoder/ Accessed 20 Feb 2023 NandakrishnanRArjunSNandakumarCNSajeshSHarikrishananKDeviPAAdaptive beamforming using minimum variance distortionless responseInt J Res Eng Sci Manag2023642730 Rajaby E, Sayedi SM, Yazdian E (2023) Hardware design and implementation of high-efficiency cube-root of complex numbers. Microprocess Microsyst. https://doi.org/10.1016/j.micpro.2023.104847 FIPS 197: Advanced Encryption Standard (AES) (2001). https://csrc.nist.gov/publications/detail/fips/197/final Accessed 20 Feb 2023 Lopez-RamirezMLedesma-CarrilloLMRodriguez-DonateCMiranda-VidalesHMata-ChavezRICabal-YepezEFpga-based online voltage/current swell segmentation and measurementComput Electr Eng202310710.1016/j.compeleceng.2023.108620 KmADuttaguptaSHdl-ready mac layer implementation for multi-node Li-Fi communicationsInt J Inf Technol202310.1007/s41870-023-01255-1 Havinga T, Jiao X, Liu W, Moerman I (2023) Accelerating fpga-based wi-fi transceiver design and prototyping by high-level synthesis. arXiv preprint arXiv:2305.13351 ZafarAPerformance of FPGA-based implementations of data classification techniques using HDL coder2022Long BeachCalifornia State University HamdaouiFSaklyAAutomatic diagnostic system for segmentation of 3d/2d brain mri images based on a hardware architectureMicroprocess Microsyst20239810.1016/j.micpro.2023.104814 David Hill: Advanced Encryption Standard (AES)-128,192, 256 (2021) https://www.mathworks.com/matlabcentral/fileexchange/73412-advanced-encryption-standard-aes-128-192-256 Accessed 20 Feb 2023 Naiem GF, Elramly S, Hasan BE, Shehata K (2008) An efficient implementation of cbc mode rijndeal aes on an fpga. In: 2008 National Radio Science Conference, pp 1– 8 Dasgupta S (1989) Computer architecture: a modern synthesis. Vol 1, John Wiley & Sons 1066_CR9 1066_CR8 1066_CR7 1066_CR5 1066_CR4 1066_CR10 1066_CR1 1066_CR11 D Sankar (1066_CR3) 2023; 43 1066_CR18 A Semmad (1066_CR12) 2023; 99 1066_CR19 A Km (1066_CR2) 2023 F Hamdaoui (1066_CR13) 2023; 98 G Elsayed (1066_CR16) 2022; 4 1066_CR21 1066_CR22 A Zafar (1066_CR15) 2022 1066_CR20 1066_CR25 1066_CR23 1066_CR24 M Lopez-Ramirez (1066_CR14) 2023; 107 E Zamiri (1066_CR17) 2021; 10 R Nandakrishnan (1066_CR6) 2023; 6 |
| References_xml | – reference: ZamiriESanchezAYushkovaMMartínez-GarcíaMSde CastroAComparison of different design alternatives for hardware-in-the-loop of power convertersElectronics202110892610.3390/electronics10080926 – reference: MathWorks, inc: HDL CoderTM\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$^{\rm TM}$$\end{document} User’s GuideCOPYRIGHT 2012-2015 (2012) https://www.mathworks.com/help/hdlcoder/ Accessed 20 Feb 2023 – reference: ElsayedGKayedSA comparative study between matlab hdl coder and vhdl for FPGAs design and implementationJ Int Soc Sci Eng202244929810.21608/jisse.2022.136645.1056 – reference: Khudair NA, Shujaa MI, Zghair EM (2023) Iot based image processing filters. In: AIP Conference Proceedings, vol 2591, AIP Publishing LLC, p 020007 – reference: FIPS 197: Advanced Encryption Standard (AES) (2001). https://csrc.nist.gov/publications/detail/fips/197/final Accessed 20 Feb 2023 – reference: Lopez-RamirezMLedesma-CarrilloLMRodriguez-DonateCMiranda-VidalesHMata-ChavezRICabal-YepezEFpga-based online voltage/current swell segmentation and measurementComput Electr Eng202310710.1016/j.compeleceng.2023.108620 – reference: MATHWORKS: Speed and Area Optimization (2022) Improvements through resource sharing, streaming, pipelining, RAM mapping. https://www.mathworks.com/help/hdlcoder/speed-and-area-optimization-1.html Accessed 20 Feb 2023 – reference: Rajaby E, Sayedi SM, Yazdian E (2023) Hardware design and implementation of high-efficiency cube-root of complex numbers. Microprocess Microsyst. https://doi.org/10.1016/j.micpro.2023.104847 – reference: SankarDLakshmiSBabuCMathewKRapid prototyping of predictive direct current control in a low-cost fpga using hdl coderInt J Power Energy Syst202343101910.2316/J.2023.203-0437 – reference: KmADuttaguptaSHdl-ready mac layer implementation for multi-node Li-Fi communicationsInt J Inf Technol202310.1007/s41870-023-01255-1 – reference: MATHWORKS Copyright 2011-2015 The MathWorks, Inc: Advanced Encryption System (AES) (2023) https://www.mathworks.com/matlabcentral/mlc-downloads/downloads/submissions/50098/versions/3/previews/mlhdlc_tutorial_comms_aes.m/index.html Accessed 20 Feb 2023 – reference: David Hill: Advanced Encryption Standard (AES)-128,192, 256 (2021) https://www.mathworks.com/matlabcentral/fileexchange/73412-advanced-encryption-standard-aes-128-192-256 Accessed 20 Feb 2023 – reference: Mathworks: Initialize Persistent Variables in MATLAB Functions (2022) https://www.mathworks.com/help/simulink/ug/initialize-persistent-variables.html Accessed 20 Feb 2023 – reference: Naiem GF, Elramly S, Hasan BE, Shehata K (2008) An efficient implementation of cbc mode rijndeal aes on an fpga. In: 2008 National Radio Science Conference, pp 1– 8 – reference: Loganathan P, Karthikeyan R (2023) Combination of wavelet transform and sobel operator using xilinx system generator for edge detection in medical plant leaf. In: Computational Vision and Bio-Inspired Computing: Proceedings of ICCVBIC 2022, Springer, pp 333– 341 – reference: Wallace NL (2023) Developing firmware for space weather probes 2 using HDL coder. Thesis on Master of Science (MS), Electrical and Computer Engineering Commons, Utah State University, Date of Award 8-2023. https://doi.org/10.26076/b311-3847 – reference: NandakrishnanRArjunSNandakumarCNSajeshSHarikrishananKDeviPAAdaptive beamforming using minimum variance distortionless responseInt J Res Eng Sci Manag2023642730 – reference: Digilent: Cmod S6 FPGA Board Reference Manual (2023) https://digilent.com/reference/_media/reference/programmable-logic/cmod-s6/cmods6_rm.pdf Accessed 20 Feb 2023 – reference: Bendahane B, Jenkal W, Laaboubi M, Latif R (2023) Hdl coder tool for ecg signal denoising. In: Digital Technologies and Applications: Proceedings of ICDTA’23, Fez, Morocco, Vol 1, pp 753– 760. Springer – reference: HamdaouiFSaklyAAutomatic diagnostic system for segmentation of 3d/2d brain mri images based on a hardware architectureMicroprocess Microsyst20239810.1016/j.micpro.2023.104814 – reference: ZafarAPerformance of FPGA-based implementations of data classification techniques using HDL coder2022Long BeachCalifornia State University – reference: Havinga T, Jiao X, Liu W, Moerman I (2023) Accelerating fpga-based wi-fi transceiver design and prototyping by high-level synthesis. arXiv preprint arXiv:2305.13351 – reference: Dasgupta S (1989) Computer architecture: a modern synthesis. Vol 1, John Wiley & Sons – reference: Neelima K, Meruva KR, Subhas C (2023) Image fusion using xilinx system generator for mri and ct medical image modalities. In: 2023 International Conference on Emerging Smart Computing and Informatics (ESCI), pp 1– 5 – reference: SemmadABahouraMScalable serial hardware architecture of multilayer perceptron neural network for automatic wheezing detectionMicroprocess Microsyst20239910.1016/j.micpro.2023.104844 – ident: 1066_CR7 doi: 10.1109/FCCM57271.2023.00047 – volume: 99 year: 2023 ident: 1066_CR12 publication-title: Microprocess Microsyst doi: 10.1016/j.micpro.2023.104844 – ident: 1066_CR1 – volume-title: Performance of FPGA-based implementations of data classification techniques using HDL coder year: 2022 ident: 1066_CR15 – volume: 10 start-page: 926 issue: 8 year: 2021 ident: 1066_CR17 publication-title: Electronics doi: 10.3390/electronics10080926 – ident: 1066_CR5 doi: 10.26076/b311-3847 – volume: 4 start-page: 92 issue: 4 year: 2022 ident: 1066_CR16 publication-title: J Int Soc Sci Eng doi: 10.21608/jisse.2022.136645.1056 – ident: 1066_CR21 – ident: 1066_CR23 – ident: 1066_CR25 doi: 10.1109/NRSC.2008.4542373 – ident: 1066_CR8 doi: 10.1016/j.micpro.2023.104847 – ident: 1066_CR4 doi: 10.1007/978-3-031-29857-8_75 – ident: 1066_CR10 – ident: 1066_CR11 doi: 10.1063/5.0135017 – ident: 1066_CR18 – volume: 98 year: 2023 ident: 1066_CR13 publication-title: Microprocess Microsyst doi: 10.1016/j.micpro.2023.104814 – ident: 1066_CR20 – ident: 1066_CR22 – ident: 1066_CR24 – volume: 43 start-page: 1 issue: 10 year: 2023 ident: 1066_CR3 publication-title: Int J Power Energy Syst doi: 10.2316/J.2023.203-0437 – volume: 107 year: 2023 ident: 1066_CR14 publication-title: Comput Electr Eng doi: 10.1016/j.compeleceng.2023.108620 – ident: 1066_CR9 doi: 10.1007/978-981-19-9819-5_25 – volume: 6 start-page: 27 issue: 4 year: 2023 ident: 1066_CR6 publication-title: Int J Res Eng Sci Manag – year: 2023 ident: 1066_CR2 publication-title: Int J Inf Technol doi: 10.1007/s41870-023-01255-1 – ident: 1066_CR19 |
| SSID | ssj0002140042 |
| Score | 2.2392094 |
| Snippet | Background
MathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick proof of... BackgroundMathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick proof of... Abstract Background MathWorks has provided an invaluable tool for designing and implementing FPGAs. MATLAB HDL coder serves a dual purpose, providing a quick... |
| SourceID | doaj proquest crossref springer |
| SourceType | Open Website Aggregation Database Enrichment Source Index Database Publisher |
| StartPage | 94 |
| SubjectTerms | AES Agriculture Algorithms Engineering Field programmable gate arrays FPGA High density lipoprotein Humanities and Social Sciences Lookup tables Matlab MATLAB HDL coder multidisciplinary Optimization Optimization techniques Science Science (multidisciplinary) |
| SummonAdditionalLinks | – databaseName: DOAJ Directory of Open Access Journals dbid: DOA link: http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwrV07T8MwELYQYmBBlIcoL3lgAIFF_IjjjC0PdSgVQ5HYLD_OCAla1AIDvx47SctDAhbWxI6sO9_dd8rddwgdOAa5BwdEMs-JCN4SWwAnhciFyTORagGrYRPFYKBub8vrT6O-Uk1YTQ9cC-7UhghQQuoANU5YoMZknOVKSgamgMwl7xtRz6dkKvlgRtPdZLMuGSVPp6lltCQxRJGUBklCv0SiirD_C8r89mO0ijeXq2ilAYq4Ux-whRZgtIZajSlO8WHDF320jlhnhMfR8h_v3-KX8JyVFUc8ilNd-x2-6gz7nS7unfdx6mGfbKCby4vhWY80oxCI4zF8kDJEeAmqSIRjwKkvufIiA5sHEZSzPACoYL2UhY_uLeOFYd6WlmYmjwYGim-ixdF4BFsIB8ZNlQm5mEsJKKwwsqSeGZcL4ShtIzoTi3YNT3gaV_Ggq3xBSV2LUkdR6kqUOu45nu95qlkyfl3dTdKer0wM19WDqHfd6F3_pfc22p3pSjdmN9URK1GpYm7N2-hkpr-P1z8fafs_jrSDltMw-rrYZRctPk9eYA8tudfn--lkv7qg7-gn40s priority: 102 providerName: Directory of Open Access Journals – databaseName: Springer Nature OA Free Journals dbid: C24 link: http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwnV3NTxUxEG8MeNADCGp4gqYHDxhp3H5st3tcUMIBCQdMuDX9mL6Q6HtkFzjw19v2dR9gwESP250mzXQ-05nfIPTRMag9OCCSeU5E8JbYBjhpRC1MXYlUC5iHTTQnJ-r8vD0tTWHDWO0-PklmS53VWskvQ-r5bEn0MSTlMZLEnGe1pqpNcn1QehyS_WU0ySUbO2Qe3frAC2Ww_gcR5h-PotnXHK7_3ylfobUSW-JuIQwb6BnMNtHLbtoXfA2IX_fwBzfRRtHsAe8W-OlPrxHrZngeDcmvi9tIhJcgrziGtziVyU_x9-7suNvHR1-PcWqJ79-gH4ffzg6OSJmsQByP3oi0IUaroJqEXwac-pYrLyqwdRBBOcsDgArWS9n4aC0r3hjmbWtpZeqor6D4W7Qym89gC-HAuMmJlYupmYDGCiNb6plxtRCO0gmiI6e1K7DjafrFT53TDyX1gmU6skxnlum45_Nyz-UCdOOv1PvpApeUCTA7L8z7qS76p22IcW5IjcTGCQvUmIqzWknJwDRQuQnaGa9fFy0edAy9qFQxVecTtDde993vp4_07t_It9GLNMV-USWzg1au-mt4j567m6uLof-Qpfs3HF7vmQ priority: 102 providerName: Springer Nature |
| Title | An optimizing technique for using MATLAB HDL coder |
| URI | https://link.springer.com/article/10.1186/s42269-023-01066-1 https://www.proquest.com/docview/2831685233 https://doaj.org/article/bf774f0829ac4be1aa03258662ea7e0c |
| Volume | 47 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| journalDatabaseRights | – providerCode: PRVAON databaseName: DOAJ Directory of Open Access Journals customDbUrl: eissn: 2522-8307 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0002140042 issn: 2522-8307 databaseCode: DOA dateStart: 20180101 isFulltext: true titleUrlDefault: https://www.doaj.org/ providerName: Directory of Open Access Journals – providerCode: PRVPQU databaseName: Health & Medical Collection customDbUrl: eissn: 2522-8307 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0002140042 issn: 2522-8307 databaseCode: 7X7 dateStart: 20181201 isFulltext: true titleUrlDefault: https://search.proquest.com/healthcomplete providerName: ProQuest – providerCode: PRVPQU databaseName: ProQuest Central customDbUrl: eissn: 2522-8307 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0002140042 issn: 2522-8307 databaseCode: BENPR dateStart: 20181201 isFulltext: true titleUrlDefault: https://www.proquest.com/central providerName: ProQuest – providerCode: PRVPQU databaseName: Publicly Available Content Database customDbUrl: eissn: 2522-8307 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0002140042 issn: 2522-8307 databaseCode: PIMPY dateStart: 20181201 isFulltext: true titleUrlDefault: http://search.proquest.com/publiccontent providerName: ProQuest – providerCode: PRVAVX databaseName: Springer Nature OA Free Journals customDbUrl: eissn: 2522-8307 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0002140042 issn: 2522-8307 databaseCode: C24 dateStart: 20181201 isFulltext: true titleUrlDefault: https://link.springer.com/search?facet-content-type=%22Journal%22 providerName: Springer Nature |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwpV1LbxMxEB7RlAOXQnmogRL5wAEEVtePtb0nlJRWRWqjCBUpnCw_q0qQtNnCgV-PvfGmKhK9cFyvvbJ2ZjwPz3wD8MbRUPvgAhbUM8yjt9jKwLDkNTd1xXMuYNdsQk6naj5vZiXg1pa0yv5M7A5qv3Q5Rn6Q1CARKrlN7OPVNc5do_LtammhsQXbGamMD2B7cjSdfdlEWSjJPEr7ahklDtpcOtrgpKpwdocEJnc0Ugfcf8fa_OuCtNM7x4__d8dPYKdYnGi8ZpFdeBAWT2G3yHSL3hbg6XfPgI4XaJmOkB-Xv9NW0AbeFSXDFuUE-Qt0Nj4_HU_QyadTlIvhV8_h6_HR-eEJLj0VsGNJD-EmJjs1KJmRywIjvmHK8yrYOvKonGUxBBWtF0L6dE5WTBrqbWNJZeokqUGxFzBYLBdhD1CkzHQulUtOGQ_SciMa4qlxNeeOkCGQ_r9qVwDHc9-L77pzPJTQa1roRAvd0UKnNe83a67WcBv3zp5kcm1mZqjsbmC5utBF8rSNycKNuYTYOG4DMaZitFZC0GBkqNwQ9nvy6SK_rb6l3RA-9Axw-_rfW3p5_9dewaPcr36dD7MPg5vVz_AaHrpfN5ftagRbci5HhYfT0yHloy5IkMZmn89m3_4AKNj2oA |
| linkProvider | ProQuest |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMw1V1LbxMxEB6VFAkuQHmIQAEfQAKB1fVjvd4DQimlStQkyiFI5eT6tVUlSEpSQPCj-I2MN7upikRvPXDdtS3vzudvZmzPDMBzz2Meoo9U8SCorIKjroiCFjKXNs9kugtYF5soxmN9eFhONuB3GwuTrlW2nFgTdZj7tEe-g2qQKY1uk3h3-pWmqlHpdLUtobGCxUH8-QNdtuXbwR7K9wXn-x-m7_u0qSpAvUAmpmWFllrURcrdFQULpdBBZtHllay0d6KKUVcuKFUEZIpMFJYHVzqW2RyxGrXAca_BpkSw6w5sTgajyaf1rg5naU3wNjpHq51lClUtKapGmtwvRdkFDVgXCrhg3f51IFvruf3b_9sfugO3Goua9FZLYAs24uwubDWctSQvm8Tar-4B783IHCnyy8kv_HSyTl9L0HAnKQDgmIx602Fvl_T3hiQF-y_uw8crmfsD6Mzms_gQSMWFrV1Gj06njIWTVpUscOtzKT1jXWCtHI1vEqqnuh6fTe1YaWVWsjcoe1PL3mCf1-s-p6t0Ipe23k3wWLdMqcDrB_PFsWmYxbgKLfgqhUhbL11k1mYCoakUj7aIme_CdgsX0_DT0pxjpQtvWsCdv_73lB5dPtozuNGfjoZmOBgfPIabPMG-vvuzDZ2zxbf4BK7772cny8XTZuUQOLpqKP4BYEVPRw |
| linkToPdf | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwpV1Lb9QwELZQQYgegBaqLhTwgQMIrMaPOM4xbVkVsax6KFJvlh_jVSXIVtmFA78eO3GWFgES4phkLEXjGc988sw3CL10DEoPDohknhMRvCW2Ak4qUQpTFiLVAvbDJqr5XF1c1GfXuvj7avfxSnLoaUgsTe368MqHwcWVPFyl_s-axHhDEqaRJOKf2-lGKsGv49zvkM5iRpONsrFb5rdLb0Sknrj_Rrb5ywVpH3emD_7_jx-i-znnxM1gJDvoFrS7aLtZdJl3A-LTNV7CXbSTPX6FX2Va6tePEGtavIwHzJfL71EIb8hfcUx7cSqfX-CPzfmsOcKnJzOcWuW7x-jT9N358SnJExeI4zFKkTrELBZUlXjNgFNfc-VFAbYMIihneQBQwXopKx9P0YJXhnlbW1qYMvoxKL6HttplC_sIB8ZND7hchGwCKiuMrKlnxpVCOEoniI5a1y7TkaepGJ91D0uU1IPKdFSZ7lWm45o3mzVXAxnHX6WP0mZuJBORdv9i2S109kttQ8x_Q2owNk5YoMYUnJVKSgamgsJN0MFoCjp790rHlIxKFSE8n6C349b__PznX3ryb-Iv0N2zk6mevZ9_eIrupUH3QyHNAdpad1_hGbrjvq0vV93z3uh_ADdr-2I |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=An+optimizing+technique+for+using+MATLAB+HDL+coder&rft.jtitle=Bulletin+of+the+National+Research+Centre&rft.au=Kayed%2C+Somaya&rft.au=Elsayed%2C+Ghada&rft.date=2023-12-01&rft.pub=Springer+Nature+B.V&rft.eissn=2522-8307&rft.volume=47&rft.issue=1&rft.spage=94&rft_id=info:doi/10.1186%2Fs42269-023-01066-1 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=2522-8307&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=2522-8307&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=2522-8307&client=summon |