Fast implementation of dense stereo vision algorithms on a highly parallel SIMD architecture

In this paper, we present faster than real-time implementation of a class of dense stereo vision algorithms on a low-power massively parallel SIMD architecture, the CSX700. With two cores, each with 96 Processing Elements, this SIMD architecture provides a peak computation power of 96 GFLOPS while c...

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Bibliographic Details
Published in:	Journal of real-time image processing Vol. 8; no. 4; pp. 421 - 435
Main Authors:	Hosseini, Fouzhan, Fijany, Amir, Safari, Saeed, Fontaine, Jean-Guy
Format:	Journal Article
Language:	English
Published:	Berlin/Heidelberg Springer Berlin Heidelberg 01.12.2013 Springer Springer Nature B.V
Subjects:	Algorithms Applied sciences Artificial intelligence Computer Graphics Computer Science Computer science; control theory; systems Computer systems and distributed systems. User interface Computer vision Electronics Exact sciences and technology Flexibility Frames per second Image Processing and Computer Vision Integrated circuits Integrated circuits by function (including memories and processors) Multimedia Information Systems Original Research Paper Pattern Recognition Pattern recognition. Digital image processing. Computational geometry Real time Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal,Image and Speech Processing Software Storage and reproduction of information Parallel computation Dense stereo vision algorithms SIMD parallel architecture High performance Computer vision Parallel algorithm Correlation Stereo image processing High definition television SIMD computer Low power Real time Distributed computing Boarded computer Vector processor Solid state device Massive parallelism Disparity Stereopsis Peak power Semiconductor storage Parallelization
ISSN:	1861-8200, 1861-8219
Online Access:	Get full text
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