Purge-Rehab: Eager Software Transactional Memory with High Performance Under Contention
Transactional memory is a programming model that attempts to make parallel programming easier. Transactional memory uses either eager (at encounter time) or lazy (at commit time) validation to check for conflicting accesses between concurrent transactions, and researchers have been divided over whic...
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| Vydáno v: | International journal of parallel programming Ročník 44; číslo 6; s. 1359 - 1383 |
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| Médium: | Journal Article |
| Jazyk: | angličtina |
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01.12.2016
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| ISSN: | 0885-7458, 1573-7640 |
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| Abstract | Transactional memory is a programming model that attempts to make parallel programming easier. Transactional memory uses either eager (at encounter time) or lazy (at commit time) validation to check for conflicting accesses between concurrent transactions, and researchers have been divided over which approach is best. Despite this, there is little work in the literature evaluating their comparative performance. One exploration of this topic using microbenchmarks found that lazy outperforms eager and increases its advantage as contention rises. Furthermore, eager was prone to livelock when accesses were irregular, which resulted in starvation and low throughput. We revisit the comparative performance of eager and lazy under contention using a larger set of microbenchmarks, more complex benchmarks from STAMP, and against multiple state-of-the-art STMs: word-based RSTM, TinySTM and SwissTM. We validate earlier findings that eager suffers from livelock, especially when accesses are irregular. This inspired Purge-Rehab: a lightweight mechanism for controlling transaction restarts in eager validation to reduce livelock and thus improve throughput and reduce starvation. Compared to lazy validation, Purge-Rehab achieves higher performance in five benchmarks, similar in four, and is lower in only one, showing that eager validation can achieve high performance under contention. Purge-Rehab is implemented in word-based RSTM, but is applicable to any eager STM. |
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| AbstractList | Transactional memory is a programming model that attempts to make parallel programming easier. Transactional memory uses either eager (at encounter time) or lazy (at commit time) validation to check for conflicting accesses between concurrent transactions, and researchers have been divided over which approach is best. Despite this, there is little work in the literature evaluating their comparative performance. One exploration of this topic using microbenchmarks found that lazy outperforms eager and increases its advantage as contention rises. Furthermore, eager was prone to livelock when accesses were irregular, which resulted in starvation and low throughput. We revisit the comparative performance of eager and lazy under contention using a larger set of microbenchmarks, more complex benchmarks from STAMP, and against multiple state-of-the-art STMs: word-based RSTM, TinySTM and SwissTM. We validate earlier findings that eager suffers from livelock, especially when accesses are irregular. This inspired Purge-Rehab: a lightweight mechanism for controlling transaction restarts in eager validation to reduce livelock and thus improve throughput and reduce starvation. Compared to lazy validation, Purge-Rehab achieves higher performance in five benchmarks, similar in four, and is lower in only one, showing that eager validation can achieve high performance under contention. Purge-Rehab is implemented in word-based RSTM, but is applicable to any eager STM. Issue Title: Special Issue on Sequential Code Parallelization Transactional memory is a programming model that attempts to make parallel programming easier. Transactional memory uses either eager (at encounter time) or lazy (at commit time) validation to check for conflicting accesses between concurrent transactions, and researchers have been divided over which approach is best. Despite this, there is little work in the literature evaluating their comparative performance. One exploration of this topic using microbenchmarks found that lazy outperforms eager and increases its advantage as contention rises. Furthermore, eager was prone to livelock when accesses were irregular, which resulted in starvation and low throughput. We revisit the comparative performance of eager and lazy under contention using a larger set of microbenchmarks, more complex benchmarks from STAMP, and against multiple state-of-the-art STMs: word-based RSTM, TinySTM and SwissTM. We validate earlier findings that eager suffers from livelock, especially when accesses are irregular. This inspired Purge-Rehab: a lightweight mechanism for controlling transaction restarts in eager validation to reduce livelock and thus improve throughput and reduce starvation. Compared to lazy validation, Purge-Rehab achieves higher performance in five benchmarks, similar in four, and is lower in only one, showing that eager validation can achieve high performance under contention. Purge-Rehab is implemented in word-based RSTM, but is applicable to any eager STM. |
| Author | Siddique, Abubakar Ansari, Mohammad Luján, Mikel |
| Author_xml | – sequence: 1 givenname: Abubakar surname: Siddique fullname: Siddique, Abubakar organization: Science and Technology Unit, Umm Al Qura University – sequence: 2 givenname: Mohammad surname: Ansari fullname: Ansari, Mohammad email: mmansari@uqu.edu.sa organization: Department of Computer Science, Umm Al Qura University – sequence: 3 givenname: Mikel surname: Luján fullname: Luján, Mikel organization: School of Computer Science, University of Manchester |
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| Cites_doi | 10.1109/TPDS.2012.315 10.1007/s11227-012-0854-y 10.1145/1073814.1073861 10.1007/978-3-540-92990-1_3 10.1145/224964.224987 10.1145/1542476.1542494 10.1145/1250662.1250676 10.1145/1065944.1065952 10.1145/800022.808319 10.1145/165123.165164 10.1145/1345206.1345241 10.1109/IISWC.2008.4636089 10.1109/IISWC.2010.5648812 10.1145/1400751.1400769 10.1145/1837853.1693465 10.1145/1375581.1375626 10.1145/1378533.1378564 10.1145/1542275.1542299 10.1109/IPDPS.2007.370498 10.1145/1594835.1504199 10.1145/1073814.1073863 |
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| Keywords | Conflict detection Livelock Starvation Software transactional memory Lazy validation Contention management Eager validation |
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| References | Dragojević, A., Guerraoui, R., Kapałka, M.: Dividing transactional memories by zero. In: TRANSACT ’08: 3rd ACM SIGPLAN Workshop on Transactional Computing, February 2008 Scherer III, William, Scott, Michael: Advanced contention management for dynamic software transactional memory. In: PODC ’05: Proceedings of the 24th Annual Symposium on Principles of Distributed Computing. ACM Press, July 2005 Dolev, S., Hendler, D., Suissa, A.: CAR-STM: Scheduling-based collision avoidance and resolution for software transactional memory. In: PODC ’07: Proceedings of the 26th Annual ACM Symposium on Principles of Distributed Computing, August 2008 Hong, S., Oguntebi, T., Casper, J., Bronson, N., Kozyrakis, C., Olukotun, K.: Eigenbench: a simple exploration tool for orthogonal tm characteristics. In: Proceedings of the IEEE International Symposium on Workload Characterization (IISWC’10), IISWC ’10, pp. 1–11, Washington, DC, USA, 2010. IEEE Computer Society RSTM. Homepage. http://www.cs.rochester.edu/research/synchronization/rstm. Accessed Sept 2014 Minh, C.C., Chung, J.W., Kozyrakis, C., Olukotun, K.: Stamp: stanford transactional applications for multi-processing. In: IISWC ’08: Proceedings of the IEEE International Symposium on Workload Characterization. IEEE, 2008 SwissTM. Homepage. http://lpdserver.epfl.ch/transactions/wiki/doku.php?id=swisstm. Accessed Sept 2014 Herlihy, M., Moss, J.E.B.: Transactional memory: Architectural support for lock-free data structures. In: ISCA ’93: Proceedings of the 20th Annual International Symposium on Computer Architecture. ACM Press, May 1993 Shriraman, A., Spear, M.F., Hossain, H., Marathe, V.J., Dwarkadas, S., Scott, M.L.: An integrated hardware-software approach to flexible transactional memory. In: ISCA ’07: Proceedings of the 34th Annual International Symposium on Computer Architecture. ACM Press, 2007 Intel. Thread building blocks. https://www.threadingbuildingblocks.orgs. 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In: IPDPS ’07: Proceedings of the 21st International Parallel and Distributed Processing Symposium, March 2007 EhsanAImproving performance of software transactional memory through contention localityJ. Supercomput.20136452754710.1007/s11227-012-0854-y Lomet, D.B.: Process structuring, synchronization, and recovery using atomic actions. In: Proceedings of an ACM conference on Language design for reliable software, March 1977 Shavit, N., Touitou, D.: Software transactional memory. In: PODC ’95: Proceedings of the 14th Annual ACM Symposium on Principles of Distributed Computing. ACM Press, Aug 1995 Shriraman, A., Dwarkadas, S.: Refereeing conflicts in hardware transactional memory. In: ICS ’09: Proceedings of the 23rd international Conference on Supercomputing, 2009 Guerraoui, R., Herlihy, M., Pochon, B.: Toward a theory of transactional contention managers. In: PODC ’05: Proceedings of the 24th Annual Symposium on Principles of Distributed Computing. ACM Press, July 2005 Harris, T., Marlow, S., Peyton-Jones, S., Herlihy, M.: Composable memory transactions. In: PPoPP ’05: Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, June 2005 Spear, M.F., Dalessandro, L., Marathe, V.J., Scott, M.L.: A comprehensive strategy for contention management in software transactional memory. In: PPoPP ’09: Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2009 TinySTM. Homepage. http://www.tmware.org/tinystm. Accessed Sept 2014 Felber, P., Fetzer, C., Riegel, T.: Dynamic performance tuning of word-based software transactional memory. In: PPoPP ’08: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming. ACM Press, February 2008 Guerraoui, R., Herlihy, M., Kapałka, M., Pochon, B.: Robust contention management in software transactional memory. In: SCOOL ’05: Workshop on Synchronization and Concurrency in Object-Oriented Languages, October 2005 Dragojević, A., Guerraoui, R., Kapalka, M.: Stretching transactional memory. In: ACM Sigplan Notices, volume 44, pages 155–165. ACM, 2009 Scherer III, W., Scott, M.: Contention management in dynamic software transactional memory. In: CSJP ’04: Workshop on Concurrency and Synchronization in Java Programs, July 2004 GilRTNegiAAcacioMEGarciaJMStenstrmPEager beats lazyIEEE Trans. Parallel Distrib. Syst.2013242192220110.1109/TPDS.2012.315 WangQKulkarniSCavazosJSpearMFA transactional memory with automatic performance tuningACM Trans. Arch. Code Opt. (TACO)20128454 Q Wang (427_CR27) 2012; 8 A Ehsan (427_CR2) 2013; 64 427_CR25 427_CR28 427_CR1 427_CR4 427_CR3 427_CR20 427_CR22 427_CR21 427_CR24 427_CR23 RT Gil (427_CR26) 2013; 24 427_CR6 427_CR5 427_CR8 427_CR7 427_CR9 427_CR15 427_CR14 427_CR17 427_CR16 427_CR19 427_CR18 427_CR11 427_CR10 427_CR13 427_CR12 |
| References_xml | – reference: TinySTM. Homepage. http://www.tmware.org/tinystm. Accessed Sept 2014 – reference: Guerraoui, R., Herlihy, M., Pochon, B.: Toward a theory of transactional contention managers. In: PODC ’05: Proceedings of the 24th Annual Symposium on Principles of Distributed Computing. ACM Press, July 2005 – reference: Dolev, S., Hendler, D., Suissa, A.: CAR-STM: Scheduling-based collision avoidance and resolution for software transactional memory. In: PODC ’07: Proceedings of the 26th Annual ACM Symposium on Principles of Distributed Computing, August 2008 – reference: WangQKulkarniSCavazosJSpearMFA transactional memory with automatic performance tuningACM Trans. Arch. Code Opt. (TACO)20128454 – reference: GilRTNegiAAcacioMEGarciaJMStenstrmPEager beats lazyIEEE Trans. Parallel Distrib. Syst.2013242192220110.1109/TPDS.2012.315 – reference: Lomet, D.B.: Process structuring, synchronization, and recovery using atomic actions. In: Proceedings of an ACM conference on Language design for reliable software, March 1977 – reference: Minh, C.C., Chung, J.W., Kozyrakis, C., Olukotun, K.: Stamp: stanford transactional applications for multi-processing. In: IISWC ’08: Proceedings of the IEEE International Symposium on Workload Characterization. IEEE, 2008 – reference: Ansari, M., Kotselidis, C., Jarvis, K., Luján, M., Kirkham, C., Watson, I.: Steal-on-abort: Improving transactional memory performance through dynamic transaction reordering. In: HIPEAC ’09: Fourth International Conference on High Performance and Embedded Architectures and Compilers, January 2009 – reference: Walther, M., Patrick, M., Pascal, F., Adi, S., Danny, H., Alexandra, F., Julia, L.L., Gilles, M.: Scheduling support for transactional memory contention management. ACM Sigplan Not. 45(5), 2010 – reference: Spear, M.F., Dalessandro, L., Marathe, V.J., Scott, M.L.: A comprehensive strategy for contention management in software transactional memory. In: PPoPP ’09: Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2009 – reference: RSTM. Homepage. http://www.cs.rochester.edu/research/synchronization/rstm. Accessed Sept 2014 – reference: SwissTM. Homepage. http://lpdserver.epfl.ch/transactions/wiki/doku.php?id=swisstm. Accessed Sept 2014 – reference: Guerraoui, R., Herlihy, M., Kapałka, M., Pochon, B.: Robust contention management in software transactional memory. In: SCOOL ’05: Workshop on Synchronization and Concurrency in Object-Oriented Languages, October 2005 – reference: Dragojević, A., Guerraoui, R., Kapalka, M.: Stretching transactional memory. In: ACM Sigplan Notices, volume 44, pages 155–165. ACM, 2009 – reference: Shriraman, A., Spear, M.F., Hossain, H., Marathe, V.J., Dwarkadas, S., Scott, M.L.: An integrated hardware-software approach to flexible transactional memory. In: ISCA ’07: Proceedings of the 34th Annual International Symposium on Computer Architecture. ACM Press, 2007 – reference: Felber, P., Fetzer, C., Riegel, T.: Dynamic performance tuning of word-based software transactional memory. In: PPoPP ’08: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming. ACM Press, February 2008 – reference: Herlihy, M., Moss, J.E.B.: Transactional memory: Architectural support for lock-free data structures. In: ISCA ’93: Proceedings of the 20th Annual International Symposium on Computer Architecture. ACM Press, May 1993 – reference: Bai, T., Shen, X., Zhang, C., Scherer, W.N., Ding, C., Scott, M.L.: A key-based adaptive transactional memory executor. In: IPDPS ’07: Proceedings of the 21st International Parallel and Distributed Processing Symposium, March 2007 – reference: Harris, T., Marlow, S., Peyton-Jones, S., Herlihy, M.: Composable memory transactions. In: PPoPP ’05: Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, June 2005 – reference: Intel. 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| SubjectTerms | Analysis Benchmarks Computer memory Computer programs Computer Science Exploration Parallel processing Parallel programming Performance evaluation Processor Architectures Programming Software Software Engineering/Programming and Operating Systems State of the art Studies Theory of Computation Weight reduction |
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