A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes: Algorithm and Implementation

5G New Radio (NR) has stringent demands on both performance and complexity for the design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI implementations. Furthermore, decoders must fully support the wide range of all 5G NR blocklengths and code rates, which is a signif...

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Veröffentlicht in:IEEE transactions on circuits and systems. I, Regular papers Jg. 71; H. 6; S. 2911 - 2924
Hauptverfasser: Ren, Yuqing, Harb, Hassan, Shen, Yifei, Balatsoukas-Stimming, Alexios, Burg, Andreas
Format: Journal Article
Sprache:Englisch
Veröffentlicht: New York IEEE 01.06.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:
5G mobile communication
5G NR wireless communications
Algorithms
Approximation
Approximation algorithms
belief propagation (BP)
Codes
Complexity
Data compression
Decoders
Decoding
Error correcting codes
Fixed points (mathematics)
Floating point arithmetic
generalized adjusted min-sum (GA-MS) decoding
Hardware
hardware implementation
Iterative decoding
LDPC codes
Linear functions
Low density parity check codes
Throughput
ISSN:1549-8328, 1558-0806
Online-Zugang:Volltext
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Zusammenfassung:5G New Radio (NR) has stringent demands on both performance and complexity for the design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI implementations. Furthermore, decoders must fully support the wide range of all 5G NR blocklengths and code rates, which is a significant challenge. In this paper, we present a high-performance and low-complexity LDPC decoder, tailor-made to fulfill the 5G requirements. First, to close the gap between belief propagation (BP) decoding and its approximations in hardware, we propose an extension of adjusted min-sum decoding, called generalized adjusted min-sum (GA-MS) decoding. This decoding algorithm flexibly truncates the incoming messages at the check node level and carefully approximates the non-linear functions of BP decoding to balance the error-rate and hardware complexity. Numerical results demonstrate that the proposed fixed-point GA-MS has only a minor gap of 0.1 dB compared to floating-point BP under various scenarios of 5G standard specifications. Secondly, we present a fully reconfigurable 5G NR LDPC decoder implementation based on GA-MS decoding. Given that memory occupies a substantial portion of the decoder area, we adopt multiple data compression and approximation techniques to reduce 42.2% of the memory overhead. The corresponding 28nm FD-SOI ASIC decoder has a core area of 1.823 mm2 and operates at 895 MHz. It is compatible with all 5G NR LDPC codes and achieves a peak throughput of 24.42 Gbps and a maximum area efficiency of 13.40 Gbps/mm2 at 4 decoding iterations.
Bibliographie:ObjectType-Article-1
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ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2024.3368056