Analog-Domain Self-Interference Cancellation for Practical Multi-Tap Full-Duplex System: Theory, Modeling, and Algorithm

Practical, in-band, full-duplex (IBFD) systems typically require more than 100 dB of self-interference cancellation (SIC). Digital processing alone is insufficient for achieving this target, which drives us towards supplementary analog mitigation techniques. We propose an analog-domain, self-interfe...

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Veröffentlicht in:	IEEE journal on selected areas in communications Jg. 41; H. 9; S. 1
Hauptverfasser:	Morgenstern, Carl W., Rong, Yu, Herschfelt, Andrew, Molnar, Alyosha C., Apsel, Alyssa B., Landon, David G., Bliss, Daniel W.
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 01.09.2023 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Algorithms Analog circuits Cancellation Cancellation circuits Carrier frequencies Codes Delay effects Delays Design parameters Full-duplex Hardware Integrated circuit modeling Interference Interference cancellation Optimization outer hull Quantization (signal) self-interference cancellation Systems design wireless communications
ISSN:	0733-8716, 1558-0008
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Abstract	Practical, in-band, full-duplex (IBFD) systems typically require more than 100 dB of self-interference cancellation (SIC). Digital processing alone is insufficient for achieving this target, which drives us towards supplementary analog mitigation techniques. We propose an analog-domain, self-interference cancellation circuit to enable pass-band, analog SIC in an IBFD system. Analog SIC is limited by several hardware constraints and design choices, including finite tap-delay resolution, non-negative tap constraints, and bit precision quantization. We characterize the performance impact of each of these limitations as a function of signal bandwidth, carrier frequency, bit precision, and other system design parameters. We further characterize the achievable system performance under all of these limitations combined. We simulate several realistic examples to illustrate the relationship between the achievable self-mitigation performance and various system design choices. We implement a simple constrained optimization algorithm informed by these results to optimize the tap-delay weights of the analog circuit under these system constraints. We simulate the achievable mitigation performance and demonstrate as much as 45 dB of analog-domain, self-interference mitigation of a wide-band signal with realistic system configurations.
AbstractList	Practical, in-band, full-duplex (IBFD) systems typically require more than 100 dB of self-interference cancellation (SIC). Digital processing alone is insufficient for achieving this target, which drives us towards supplementary analog mitigation techniques. We propose an analog-domain, self-interference cancellation circuit to enable pass-band, analog SIC in an IBFD system. Analog SIC is limited by several hardware constraints and design choices, including finite tap-delay resolution, non-negative tap constraints, and bit precision quantization. We characterize the performance impact of each of these limitations as a function of signal bandwidth, carrier frequency, bit precision, and other system design parameters. We further characterize the achievable system performance under all of these limitations combined. We simulate several realistic examples to illustrate the relationship between the achievable self-mitigation performance and various system design choices. We implement a simple constrained optimization algorithm informed by these results to optimize the tap-delay weights of the analog circuit under these system constraints. We simulate the achievable mitigation performance and demonstrate as much as 45 dB of analog-domain, self-interference mitigation of a wide-band signal with realistic system configurations.
Author	Bliss, Daniel W. Apsel, Alyssa B. Landon, David G. Morgenstern, Carl W. Molnar, Alyosha C. Herschfelt, Andrew Rong, Yu
Author_xml	– sequence: 1 givenname: Carl W. surname: Morgenstern fullname: Morgenstern, Carl W. organization: Center for Wireless Information Systems and Computational Architectures (WISCA), Arizona State University, Tempe, AZ, USA – sequence: 2 givenname: Yu orcidid: 0000-0003-3365-5786 surname: Rong fullname: Rong, Yu organization: Center for Wireless Information Systems and Computational Architectures (WISCA), Arizona State University, Tempe, AZ, USA – sequence: 3 givenname: Andrew surname: Herschfelt fullname: Herschfelt, Andrew organization: Center for Wireless Information Systems and Computational Architectures (WISCA), Arizona State University, Tempe, AZ, USA – sequence: 4 givenname: Alyosha C. surname: Molnar fullname: Molnar, Alyosha C. organization: School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA – sequence: 5 givenname: Alyssa B. surname: Apsel fullname: Apsel, Alyssa B. organization: School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA – sequence: 6 givenname: David G. surname: Landon fullname: Landon, David G. organization: L3Harris, 640 N 2200 W, Salt Lake City, UT, United States – sequence: 7 givenname: Daniel W. orcidid: 0000-0001-8962-2954 surname: Bliss fullname: Bliss, Daniel W. organization: Center for Wireless Information Systems and Computational Architectures (WISCA), Arizona State University, Tempe, AZ, USA
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SubjectTerms	Algorithms Analog circuits Cancellation Cancellation circuits Carrier frequencies Codes Delay effects Delays Design parameters Full-duplex Hardware Integrated circuit modeling Interference Interference cancellation Optimization outer hull Quantization (signal) self-interference cancellation Systems design wireless communications
Title	Analog-Domain Self-Interference Cancellation for Practical Multi-Tap Full-Duplex System: Theory, Modeling, and Algorithm
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