N-body computations using skeletal frameworks on multicore CPU/graphics processing unit architectures: an empirical performance evaluation

SUMMARYWith the emergence of general‐purpose computation on graphics processing units, high‐level approaches that hide the conceptual complexity of the low‐level Compute Unified Device Architecture and Open Computing Language platforms are the subject of active research. However, these approaches ma...

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Published in:Concurrency and computation Vol. 26; no. 4; pp. 972 - 986
Main Authors: Goli, Mehdi, González-Vélez, Horacio
Format: Journal Article
Language:English
Published: Blackwell Publishing Ltd 25.03.2014
Subjects:
algorithmic skeletons
Algorithms
Complexity
Computation
Devices
general-purpose computing on graphics processing units
GPU
Graphics processing units
Hardware
parallel computing
Performance evaluation
Serials
structured parallelism
ISSN:1532-0626, 1532-0634
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Abstract SUMMARYWith the emergence of general‐purpose computation on graphics processing units, high‐level approaches that hide the conceptual complexity of the low‐level Compute Unified Device Architecture and Open Computing Language platforms are the subject of active research. However, these approaches may require a trade‐off in terms of achieved performance and utilisation on graphics processing units hardware and may impose algorithmic limitations. In this paper, we present and systematically evaluate the parallel performance of three implementations of the brute force, all‐pairs N‐body algorithm with skeletal deployments based on the FastFlow, SkePU and Thrust frameworks. Our results indicate that the skeletal framework implementation achieves up to two orders of magnitude speed‐up over serial version with a Tesla M2050 with lower implementation complexity than low‐level Compute Unified Device Architecture programming. Copyright © 2013 John Wiley & Sons, Ltd.
AbstractList With the emergence of general‐purpose computation on graphics processing units, high‐level approaches that hide the conceptual complexity of the low‐level Compute Unified Device Architecture and Open Computing Language platforms are the subject of active research. However, these approaches may require a trade‐off in terms of achieved performance and utilisation on graphics processing units hardware and may impose algorithmic limitations. In this paper, we present and systematically evaluate the parallel performance of three implementations of the brute force, all‐pairs N ‐body algorithm with skeletal deployments based on the FastFlow, SkePU and Thrust frameworks. Our results indicate that the skeletal framework implementation achieves up to two orders of magnitude speed‐up over serial version with a Tesla M2050 with lower implementation complexity than low‐level Compute Unified Device Architecture programming. Copyright © 2013 John Wiley & Sons, Ltd.
With the emergence of general-purpose computation on graphics processing units, high-level approaches that hide the conceptual complexity of the low-level Compute Unified Device Architecture and Open Computing Language platforms are the subject of active research. However, these approaches may require a trade-off in terms of achieved performance and utilisation on graphics processing units hardware and may impose algorithmic limitations. In this paper, we present and systematically evaluate the parallel performance of three implementations of the brute force, all-pairs N-body algorithm with skeletal deployments based on the FastFlow, SkePU and Thrust frameworks. Our results indicate that the skeletal framework implementation achieves up to two orders of magnitude speed-up over serial version with a Tesla M2050 with lower implementation complexity than low-level Compute Unified Device Architecture programming. Copyright copyright 2013 John Wiley & Sons, Ltd.
SUMMARYWith the emergence of general‐purpose computation on graphics processing units, high‐level approaches that hide the conceptual complexity of the low‐level Compute Unified Device Architecture and Open Computing Language platforms are the subject of active research. However, these approaches may require a trade‐off in terms of achieved performance and utilisation on graphics processing units hardware and may impose algorithmic limitations. In this paper, we present and systematically evaluate the parallel performance of three implementations of the brute force, all‐pairs N‐body algorithm with skeletal deployments based on the FastFlow, SkePU and Thrust frameworks. Our results indicate that the skeletal framework implementation achieves up to two orders of magnitude speed‐up over serial version with a Tesla M2050 with lower implementation complexity than low‐level Compute Unified Device Architecture programming. Copyright © 2013 John Wiley & Sons, Ltd.
Author González-Vélez, Horacio
Goli, Mehdi
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  email: Correspondence to: Mehdi Goli, Robert Gordon University, IDEAS Research Institute, St Andrew Street, Aberdeen AB25 1HG, Scotland, United Kingdom., m.goli@rgu.ac.uk
  organization: IDEAS Research Institute, Robert Gordon University, Aberdeen, UK
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  givenname: Horacio
  surname: González-Vélez
  fullname: González-Vélez, Horacio
  organization: Cloud Competency Centre, National College of Ireland, Dublin, Ireland
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Cites_doi 10.1142/S0129626405002209
10.1145/1863482.1863487
10.1887/0852743920
10.1007/978‐3‐642‐23397‐5_17
10.1063/1.1704156
10.1002/cpe.1860
10.1002/spe.1026
10.1038/324446a0
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Snippet SUMMARYWith the emergence of general‐purpose computation on graphics processing units, high‐level approaches that hide the conceptual complexity of the...
With the emergence of general‐purpose computation on graphics processing units, high‐level approaches that hide the conceptual complexity of the low‐level...
With the emergence of general-purpose computation on graphics processing units, high-level approaches that hide the conceptual complexity of the low-level...
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SubjectTerms algorithmic skeletons
Algorithms
Complexity
Computation
Devices
general-purpose computing on graphics processing units
GPU
Graphics processing units
Hardware
parallel computing
Performance evaluation
Serials
structured parallelism
Title N-body computations using skeletal frameworks on multicore CPU/graphics processing unit architectures: an empirical performance evaluation
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