Design and implementation of Least Mean Square adaptive FIR filter using offset binary coding based Distributed Arithmetic

Distributed Arithmetic (DA) based architecture is an efficient technique to attain high throughput without hardware multiplier and also it is essential for bit serial operation. The DA based Finite Impulse Response (FIR) adaptive filter is well suited for hardware implementation in Field Programmabl...

Full description

Saved in:

Bibliographic Details
Published in:	Microprocessors and microsystems Vol. 71; p. 102884
Main Authors:	Kalaiyarasi, D., Kalpalatha Reddy, T.
Format:	Journal Article
Language:	English
Published:	Kidlington Elsevier B.V 01.11.2019 Elsevier BV
Subjects:	Accumulators Adaptive filter Adaptive filters Arithmetic Arithmetic coding Binary codes Carry Save Accumulator Distributed Arithmetic Field programmable gate arrays FIR filters Hardware Impulse response Least Mean Square Logic Lookup tables Offset binary coding Reduction Shift accumulator Offset binary coding Shift accumulator Carry Save Accumulator Adaptive filter Distributed Arithmetic Least Mean Square
ISSN:	0141-9331
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!

Be the first to leave a comment!