A parallel multi-unit resource deadlock detection algorithm with O ( log 2 ( min ( m , n ) ) ) overall run-time complexity - Xiao, Xiang; Lee, Jaehwan John (Journal of parallel and distributed computing, 2011)
Current MPSoCs typically consist of less than a dozen processing units. Future MPSoCs are likely to integrate many more. With this trend, dozens of applications can be running on an MPSoC concurrently and application deadlock on MPSoCs will become a severe problem. To address the application deadlock problem in current and future MPSoCs, this article proposes a parallel multi-unit resource deadlock detection algorithm, incorporating four contributions: (1) a classification of resource events that enables each category of events to be handled efficiently, (2) a parallel node hopping mechanism that explores the entire graph exponentially in parallel to obtain information about reachable processes of every resource, (3) an innovative hardware implementation of the node hopping mechanism using bit-wise computations, and (4) proofs of correctness and run-time complexity of the proposed algorithm. Based on information about reachable processes as well as sink nodes in the graph, the proposed algorithm detects deadlock in O(1) run-time. Compared with the worst case run-time of any previous algorithm, which employs a single scheme to handle all resource events, ours is considerably reduced to O ( log 2 ( min ( m , n ) ) ) when implemented in hardware, where m and n are the number of processes and resources, respectively. ► Parallel multi-unit resource deadlock detection algorithm with O ( log 2 ( min ( m , n ) ) ) overall run-time complexity, where m and n are the number of processes and resources, respectively. ► Utilizing a classification of resource events that enables each category of events to be handled efficiently in parallel. ► Parallel node hopping mechanism that explores the entire multi-unit resource allocation graph (RAG) exponentially in parallel to obtain information about reachable processes of every resource. ► Innovative parallel hardware implementation of the node hopping mechanism using bit-wise computations.► Proofs of the correctness and run-time complexity of the proposed algorithm.