Ternary encoder and decoder designs in RRAM and CNTFET technologies
•Design of low-power technique for unbalanced ternary logic system.•Ternary encoder and decoder designs for low-power applications.•RRAM idea to implement the ternary logic.•Ternary logic is generated using CNTFET nanotechnology.•Outlined the ternary approach for logic implementation. A possible way...
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| Abstract | •Design of low-power technique for unbalanced ternary logic system.•Ternary encoder and decoder designs for low-power applications.•RRAM idea to implement the ternary logic.•Ternary logic is generated using CNTFET nanotechnology.•Outlined the ternary approach for logic implementation.
A possible way for the very large scale integration (VLSI) industry to keep up with the pace of high density, computational capability, and energy efficiency is to look into some technologies ahead of binary logic. In recent years, multiple-valued logic (MVL) has caught the notable attention of digital system designers. The carbon nanotube field effect transistor (CNTFET) has been exclusively used for the implementation of MVL circuits. Resistive random-access memory (RRAM) offers a very durable option for executing the MVL due to its capability of storing various resistance states in one cell. In this paper, a ternary 9:2 encoder and a ternary 2:9 decoder have been designed and simulated using the proposed RRAM-based ternary logic gates with standard 32nm CNTFETs. In comparison to other ternary circuits in the literature, the proposed CNTFET RRAM-based ternary logic circuits show less power consumption, delay, and power delay product (PDP). The power of the CNTFET RRAM-based proposed ternary inverter (TI), ternary NAND (TNAND), and ternary NOR (TNOR) is 32.78%, 51.48%, and 24.14% less than the lowest power of the other designs under consideration. The PVT variations and reliability of the proposed encoder and decoder circuits have also been studied. |
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| AbstractList | A possible way for the very large scale integration (VLSI) industry to keep up with the pace of high density, computational capability, and energy efficiency is to look into some technologies ahead of binary logic. In recent years, multiple-valued logic (MVL) has caught the notable attention of digital system designers. The carbon nanotube field effect transistor (CNTFET) has been exclusively used for the implementation of MVL circuits. Resistive random-access memory (RRAM) offers a very durable option for executing the MVL due to its capability of storing various resistance states in one cell. In this paper, a ternary 9:2 encoder and a ternary 2:9 decoder have been designed and simulated using the proposed RRAM-based ternary logic gates with standard 32nm CNTFETs. In comparison to other ternary circuits in the literature, the proposed CNTFET RRAM-based ternary logic circuits show less power consumption, delay, and power delay product (PDP). The power of the CNTFET RRAM-based proposed ternary inverter (TI), ternary NAND (TNAND), and ternary NOR (TNOR) is 32.78%, 51.48%, and 24.14% less than the lowest power of the other designs under consideration. The PVT variations and reliability of the proposed encoder and decoder circuits have also been studied. •Design of low-power technique for unbalanced ternary logic system.•Ternary encoder and decoder designs for low-power applications.•RRAM idea to implement the ternary logic.•Ternary logic is generated using CNTFET nanotechnology.•Outlined the ternary approach for logic implementation. A possible way for the very large scale integration (VLSI) industry to keep up with the pace of high density, computational capability, and energy efficiency is to look into some technologies ahead of binary logic. In recent years, multiple-valued logic (MVL) has caught the notable attention of digital system designers. The carbon nanotube field effect transistor (CNTFET) has been exclusively used for the implementation of MVL circuits. Resistive random-access memory (RRAM) offers a very durable option for executing the MVL due to its capability of storing various resistance states in one cell. In this paper, a ternary 9:2 encoder and a ternary 2:9 decoder have been designed and simulated using the proposed RRAM-based ternary logic gates with standard 32nm CNTFETs. In comparison to other ternary circuits in the literature, the proposed CNTFET RRAM-based ternary logic circuits show less power consumption, delay, and power delay product (PDP). The power of the CNTFET RRAM-based proposed ternary inverter (TI), ternary NAND (TNAND), and ternary NOR (TNOR) is 32.78%, 51.48%, and 24.14% less than the lowest power of the other designs under consideration. The PVT variations and reliability of the proposed encoder and decoder circuits have also been studied. |
| ArticleNumber | 100397 |
| Author | Sharma, Vijay Kumar Haq, Shams Ul |
| Author_xml | – sequence: 1 givenname: Shams Ul surname: Haq fullname: Haq, Shams Ul – sequence: 2 givenname: Vijay Kumar surname: Sharma fullname: Sharma, Vijay Kumar email: tovksharma@gmail.com |
| BookMark | eNqFkF1LwzAYhYNMcM79Am_6Bzrz0SbthRej-DGYCmNehzR5OzNqIkkR_Pdmq4h4oRDI4STPSd5zjibOO0DokuAFwYRf7Rdvwb7CgmLKkoNZLU7QlApBcy4ImfzQZ2ge4x5jTAUr0pqiZgvBqfCRgdPeQMiUM5mBURuIdudiZl222SwfjmfN4_b2ZpsNoF-c7_3OQrxAp53qI8y_9hl6Tlea-3z9dLdqlutcM1qLnEChMNeKtSqJilR12xKqMSiNKwbKcMUrzUxJuGnLuuO65YTjtsJQFqbQbIZWY67xai8PQ6ePS6-sPBo-7KQKg9U9SNwWAmhHADpRlFhXVJVdR5KtWdkds9iYpYOPMUD3nUewPNQqxxdAHmqVY62Jqn9R2g5qsN4NQdn-H_Z6ZCFV9G4hyKhtah2MDaCHNIP9k_8ED9qVYg |
| CitedBy_id | crossref_primary_10_1016_j_prime_2024_100477 crossref_primary_10_1088_1402_4896_ad61ca crossref_primary_10_1088_1402_4896_ad9646 crossref_primary_10_1038_s41598_025_16335_4 crossref_primary_10_1088_1402_4896_ad451c crossref_primary_10_1007_s11071_024_09402_4 crossref_primary_10_1088_1402_4896_ad6194 |
| Cites_doi | 10.1088/2631-8695/ac0fc6 10.1109/TNANO.2009.2036845 10.1049/iet-cds.2010.0340 10.1088/0268-1242/31/11/113001 10.3390/electronics9040542 10.1109/JSSC.1984.1052216 10.1002/cta.3667 10.1109/ACCESS.2019.2928251 10.1109/TED.2016.2545412 10.1049/iet-cdt.2013.0023 10.1007/s13369-023-07618-x 10.1080/00207217.2021.1908620 10.4236/cs.2016.74036 10.1109/TCSI.2021.3121437 10.1186/s11671-020-03299-9 10.1109/ACCESS.2020.2997809 10.1016/j.mejo.2017.02.018 10.1166/jctn.2010.1517 10.3390/electronics9010200 10.1109/TNANO.2018.2800015 10.1155/2016/6303725 10.3390/nano10081437 10.1016/j.aeue.2023.154601 10.1063/1.4954974 10.1149/2162-8777/acc137 10.1007/s13369-023-08053-8 10.1116/1.4973372 10.1039/C5RA22728C 10.1080/00207210701295061 10.1039/C8RA03181A 10.1002/pssa.201532813 10.1109/JEDS.2018.2805285 |
| ContentType | Journal Article |
| Copyright | 2023 The Author(s) |
| Copyright_xml | – notice: 2023 The Author(s) |
| DBID | 6I. AAFTH AAYXX CITATION DOA |
| DOI | 10.1016/j.prime.2023.100397 |
| DatabaseName | ScienceDirect Open Access Titles Elsevier:ScienceDirect:Open Access CrossRef DOAJ Directory of Open Access Journals |
| DatabaseTitle | CrossRef |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: DOA name: DOAJ Directory of Open Access Journals url: https://www.doaj.org/ sourceTypes: Open Website |
| DeliveryMethod | fulltext_linktorsrc |
| EISSN | 2772-6711 |
| ExternalDocumentID | oai_doaj_org_article_0b47e2f1eef7450c82a5ff10b4c35f4c 10_1016_j_prime_2023_100397 S2772671123002929 |
| GroupedDBID | 6I. AAFTH AAXUO AEXQZ AKRWK ALMA_UNASSIGNED_HOLDINGS AMRAJ EBS FDB GROUPED_DOAJ M41 OK1 ROL AALRI AAYWO AAYXX ACVFH ADCNI ADVLN AEUPX AFJKZ AFPUW AIGII AITUG AKBMS AKYEP APXCP CITATION |
| ID | FETCH-LOGICAL-c3297-1e4a06ca3ba4a08189bb12c0eac083ead6a68c3d516db59f6cb6160b80e54d4c3 |
| IEDL.DBID | DOA |
| ISSN | 2772-6711 |
| IngestDate | Fri Oct 03 12:51:41 EDT 2025 Tue Nov 18 21:02:15 EST 2025 Sat Nov 29 07:34:17 EST 2025 Sat Mar 30 16:21:39 EDT 2024 |
| IsDoiOpenAccess | true |
| IsOpenAccess | true |
| IsPeerReviewed | true |
| IsScholarly | true |
| Keywords | Ternary logic RRAM CNTFET Decoder Encoder |
| Language | English |
| License | This is an open access article under the CC BY license. |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-c3297-1e4a06ca3ba4a08189bb12c0eac083ead6a68c3d516db59f6cb6160b80e54d4c3 |
| OpenAccessLink | https://doaj.org/article/0b47e2f1eef7450c82a5ff10b4c35f4c |
| ParticipantIDs | doaj_primary_oai_doaj_org_article_0b47e2f1eef7450c82a5ff10b4c35f4c crossref_primary_10_1016_j_prime_2023_100397 crossref_citationtrail_10_1016_j_prime_2023_100397 elsevier_sciencedirect_doi_10_1016_j_prime_2023_100397 |
| PublicationCentury | 2000 |
| PublicationDate | March 2024 2024-03-00 2024-03-01 |
| PublicationDateYYYYMMDD | 2024-03-01 |
| PublicationDate_xml | – month: 03 year: 2024 text: March 2024 |
| PublicationDecade | 2020 |
| PublicationTitle | e-Prime |
| PublicationYear | 2024 |
| Publisher | Elsevier Ltd Elsevier |
| Publisher_xml | – name: Elsevier Ltd – name: Elsevier |
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| SSID | ssj0002734734 |
| Score | 2.3185525 |
| Snippet | •Design of low-power technique for unbalanced ternary logic system.•Ternary encoder and decoder designs for low-power applications.•RRAM idea to implement the... A possible way for the very large scale integration (VLSI) industry to keep up with the pace of high density, computational capability, and energy efficiency... |
| SourceID | doaj crossref elsevier |
| SourceType | Open Website Enrichment Source Index Database Publisher |
| StartPage | 100397 |
| SubjectTerms | CNTFET Decoder Encoder RRAM Ternary logic |
| Title | Ternary encoder and decoder designs in RRAM and CNTFET technologies |
| URI | https://dx.doi.org/10.1016/j.prime.2023.100397 https://doaj.org/article/0b47e2f1eef7450c82a5ff10b4c35f4c |
| Volume | 7 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| journalDatabaseRights | – providerCode: PRVAON databaseName: DOAJ Directory of Open Access Journals customDbUrl: eissn: 2772-6711 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0002734734 issn: 2772-6711 databaseCode: DOA dateStart: 20210101 isFulltext: true titleUrlDefault: https://www.doaj.org/ providerName: Directory of Open Access Journals |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwrV3PS8MwFA4yPHgRRcX5ixw8Wm3aJG2Oczg86JAxZbfQ_IINqWObgv-9L0krPc2L0ENI0yR8r-S9Fz6-h9C1NsxpoQSkJYYm1GieKGHKxDLBlKCK8SAp9PZUjMflbCZeOqW-PCcsygNH4O5SRQubOWKtKyhLdZlVzDkC3Tpnjmp_-qaF6CRTi0a0BZ5WZigQupZeL__Wlwv31IDcyzx1XFFQ7O94pI6XGR2g_SY8xIO4rUO0Y-sjNJz6S7vVN_aik8auMGT_2NjYNoGCscbzGk8mg-fwbjiejh6meNNem0M2fIxeoWv4mDTFDxKdZ6JIiKVVynWVqwoa4FaFUiTTKRyUEDWB_XnFS50bRrhRTDiuFSc8VWVqGTUAzgnq1R-1PUUYcgZlqjLnJBQXcYIKUlYQSRFFHM9JH2UtDlI3yuC-QMW7bClgCxnAkx48GcHro5vfj5ZRGGP78HsP8O9Qr2odOsDWsrG1_MvWfcRb88gmQIiOH6aab1v97D9WP0d7MCWNBLQL1NusPu0l2tVfm_l6dRX-vx97I97K |
| linkProvider | Directory of Open Access Journals |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Ternary+encoder+and+decoder+designs+in+RRAM+and+CNTFET+technologies&rft.jtitle=e-Prime&rft.au=Haq%2C+Shams+Ul&rft.au=Sharma%2C+Vijay+Kumar&rft.date=2024-03-01&rft.issn=2772-6711&rft.eissn=2772-6711&rft.volume=7&rft.spage=100397&rft_id=info:doi/10.1016%2Fj.prime.2023.100397&rft.externalDBID=n%2Fa&rft.externalDocID=10_1016_j_prime_2023_100397 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=2772-6711&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=2772-6711&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=2772-6711&client=summon |