Simplified Log-MAP Algorithm for Very Low-Complexity Turbo Decoder Hardware Architectures

Motivated by the importance of hardware implementation in practical turbo decoders, a simplified, yet effective, n-input max* approximation algorithm is proposed with the aim being its efficient implementation for very low-complexity turbo decoder hardware architectures. The simplification is obtain...

Full description

Saved in:

Bibliographic Details
Published in:	IEEE transactions on instrumentation and measurement Vol. 63; no. 3; pp. 531 - 537
Main Authors:	Martina, Maurizio, Papaharalabos, Stylianos, Mathiopoulos, P. Takis, Masera, Guido
Format:	Journal Article
Language:	English
Published:	New York IEEE 01.03.2014 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:	Algorithms Approximation methods Architecture Bit error rate Codes Complexity theory Computer architecture Decoders Decoding Delays Digital circuit Digital circuits Expenses Hardware Instrumentation logarithmic maximum a posteriori (Log-MAP) Max-Log-MAP Turbo codes
ISSN:	0018-9456, 1557-9662
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!

Be the first to leave a comment!