Simplified Log-MAP Algorithm for Very Low-Complexity Turbo Decoder Hardware Architectures

Motivated by the importance of hardware implementation in practical turbo decoders, a simplified, yet effective, n-input max* approximation algorithm is proposed with the aim being its efficient implementation for very low-complexity turbo decoder hardware architectures. The simplification is obtain...

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Vydané v:	IEEE transactions on instrumentation and measurement Ročník 63; číslo 3; s. 531 - 537
Hlavní autori:	Martina, Maurizio, Papaharalabos, Stylianos, Mathiopoulos, P. Takis, Masera, Guido
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.03.2014 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Algorithms Approximation methods Architecture Bit error rate Codes Complexity theory Computer architecture Decoders Decoding Delays Digital circuit Digital circuits Expenses Hardware Instrumentation logarithmic maximum a posteriori (Log-MAP) Max-Log-MAP Turbo codes
ISSN:	0018-9456, 1557-9662
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