SpikeSim: An end-to-end Compute-in-Memory Hardware Evaluation Tool for Benchmarking Spiking Neural Networks

Spiking Neural Networks (SNNs) are an active research domain towards energy efficient machine intelligence. Compared to conventional artificial neural networks (ANNs), SNNs use temporal spike data and bio-plausible neuronal activation functions such as Leaky-Integrate Fire/Integrate Fire (LIF/IF) fo...

Celý popis

Uloženo v:

Podrobná bibliografie
Vydáno v:	IEEE transactions on computer-aided design of integrated circuits and systems Ročník 42; číslo 11; s. 1
Hlavní autoři:	Moitra, Abhishek, Bhattacharjee, Abhiroop, Kuang, Runcong, Krishnan, Gokul, Cao, Yu, Panda, Priyadarshini
Médium:	Journal Article
Jazyk:	angličtina
Vydáno:	New York IEEE 01.11.2023 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:	Analog Crossbars Artificial neural networks Benchmark testing Biological neural networks Computation Computer architecture Computer memory Computer Science Data communication Data processing Emerging Devices Energy efficiency Engineering Engines Hardware In-Memory Computing Modules Network latency Neural networks Neurons Spiking Neural Networks (SNNs)
ISSN:	0278-0070, 1937-4151
On-line přístup:	Získat plný text
Tagy:	Přidat tag Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!

Abstract	Spiking Neural Networks (SNNs) are an active research domain towards energy efficient machine intelligence. Compared to conventional artificial neural networks (ANNs), SNNs use temporal spike data and bio-plausible neuronal activation functions such as Leaky-Integrate Fire/Integrate Fire (LIF/IF) for data processing. However, SNNs incur significant dot-product operations causing high memory and computation overhead in standard von-Neumann computing platforms. To this end, In-Memory Computing (IMC) architectures have been proposed to alleviate the "memory-wall bottleneck" prevalent in von-Neumann architectures. Although recent works have proposed IMC-based SNN hardware accelerators, the following key implementation aspects have been overlooked 1) the adverse effects of crossbar non-ideality on SNN performance due to repeated analog dot-product operations over multiple time-steps 2) hardware overheads of essential SNN-specific components such as the LIF/IF and data communication modules. To this end, we propose SpikeSim, a tool that can perform realistic performance, energy, latency and area evaluation of IMC-mapped SNNs. SpikeSim consists of a practical monolithic IMC architecture called SpikeFlow for mapping SNNs. Additionally, the non-ideality computation engine (NICE) and energy-latency-area (ELA) engine performs hardware-realistic evaluation of SpikeFlow-mapped SNNs. Based on 65nm CMOS implementation and experiments on CIFAR10, CIFAR100 and TinyImagenet datasets, we find that the LIF/IF neuronal module has significant area contribution (>11% of the total hardware area). To this end, we propose SNN topological modifications that leads to 1.24× and 10× reduction in the neuronal module's area and the overall energy-delay-product value, respectively. Furthermore, in this work, we perform a holistic comparison between IMC implemented ANN and SNNs and conclude that lower number of time-steps are the key to achieve higher throughput and energy-efficiency for SNNs compared to 4-bit ANNs. The code repository for the SpikeSim tool is available at https://github.com/Intelligent-Computing-Lab-Yale/Quanitzation-aware-SNN-training-and-hardware-evaluation-for-IMC-Architectures
AbstractList	Spiking neural networks (SNNs) are an active research domain toward energy-efficient machine intelligence. Compared to conventional artificial neural networks (ANNs), SNNs use temporal spike data and bio-plausible neuronal activation functions such as leaky-integrate fire/integrate fire (LIF/IF) for data processing. However, SNNs incur significant dot-product operations causing high memory and computation overhead in standard von-Neumann computing platforms. To this end, in-memory computing (IMC) architectures have been proposed to alleviate the “memory-wall bottleneck” prevalent in von-Neumann architectures. Although recent works have proposed IMC-based SNN hardware accelerators, the following key implementation aspects have been overlooked: 1) the adverse effects of crossbar nonideality on SNN performance due to repeated analog dot-product operations over multiple time-steps and 2) hardware overheads of essential SNN-specific components, such as the LIF/IF and data communication modules. To this end, we propose SpikeSim, a tool that can perform realistic performance, energy, latency and area evaluation of IMC-mapped SNNs. SpikeSim consists of a practical monolithic IMC architecture called SpikeFlow for mapping SNNs. Additionally, the nonideality computation engine (NICE) and energy–latency–area (ELA) engine performs hardware-realistic evaluation of SpikeFlow-mapped SNNs. Based on 65nm CMOS implementation and experiments on CIFAR10, CIFAR100 and TinyImagenet datasets, we find that the LIF/IF neuronal module has significant area contribution [Formula Omitted] of the total hardware area). To this end, we propose SNN topological modifications that leads to [Formula Omitted] and [Formula Omitted] reduction in the neuronal module’s area and the overall energy-delay-product value, respectively. Furthermore, in this work, we perform a holistic comparison between IMC implemented ANN and SNNs and conclude that lower number of time-steps are the key to achieve higher throughput and energy-efficiency for SNNs compared to 4-bit ANNs. The code repository for the SpikeSim tool is available at Github link. Not provided. Spiking Neural Networks (SNNs) are an active research domain towards energy efficient machine intelligence. Compared to conventional artificial neural networks (ANNs), SNNs use temporal spike data and bio-plausible neuronal activation functions such as Leaky-Integrate Fire/Integrate Fire (LIF/IF) for data processing. However, SNNs incur significant dot-product operations causing high memory and computation overhead in standard von-Neumann computing platforms. To this end, In-Memory Computing (IMC) architectures have been proposed to alleviate the "memory-wall bottleneck" prevalent in von-Neumann architectures. Although recent works have proposed IMC-based SNN hardware accelerators, the following key implementation aspects have been overlooked 1) the adverse effects of crossbar non-ideality on SNN performance due to repeated analog dot-product operations over multiple time-steps 2) hardware overheads of essential SNN-specific components such as the LIF/IF and data communication modules. To this end, we propose SpikeSim, a tool that can perform realistic performance, energy, latency and area evaluation of IMC-mapped SNNs. SpikeSim consists of a practical monolithic IMC architecture called SpikeFlow for mapping SNNs. Additionally, the non-ideality computation engine (NICE) and energy-latency-area (ELA) engine performs hardware-realistic evaluation of SpikeFlow-mapped SNNs. Based on 65nm CMOS implementation and experiments on CIFAR10, CIFAR100 and TinyImagenet datasets, we find that the LIF/IF neuronal module has significant area contribution (>11% of the total hardware area). To this end, we propose SNN topological modifications that leads to 1.24× and 10× reduction in the neuronal module's area and the overall energy-delay-product value, respectively. Furthermore, in this work, we perform a holistic comparison between IMC implemented ANN and SNNs and conclude that lower number of time-steps are the key to achieve higher throughput and energy-efficiency for SNNs compared to 4-bit ANNs. The code repository for the SpikeSim tool is available at https://github.com/Intelligent-Computing-Lab-Yale/Quanitzation-aware-SNN-training-and-hardware-evaluation-for-IMC-Architectures
Author	Cao, Yu Moitra, Abhishek Kuang, Runcong Panda, Priyadarshini Krishnan, Gokul Bhattacharjee, Abhiroop
Author_xml	– sequence: 1 givenname: Abhishek orcidid: 0000-0002-0534-5206 surname: Moitra fullname: Moitra, Abhishek organization: Department of Electrical Engineering, Yale University, New Haven, CT, USA – sequence: 2 givenname: Abhiroop orcidid: 0000-0002-7721-271X surname: Bhattacharjee fullname: Bhattacharjee, Abhiroop organization: Department of Electrical Engineering, Yale University, New Haven, CT, USA – sequence: 3 givenname: Runcong surname: Kuang fullname: Kuang, Runcong organization: School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, U.S – sequence: 4 givenname: Gokul orcidid: 0000-0003-1813-1140 surname: Krishnan fullname: Krishnan, Gokul organization: School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, U.S – sequence: 5 givenname: Yu orcidid: 0000-0001-6968-1180 surname: Cao fullname: Cao, Yu organization: School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, U.S – sequence: 6 givenname: Priyadarshini orcidid: 0000-0002-4167-6782 surname: Panda fullname: Panda, Priyadarshini organization: Department of Electrical Engineering, Yale University, New Haven, CT, USA
BackLink	https://www.osti.gov/biblio/2579823$$D View this record in Osti.gov
BookMark	eNp9kE9vEzEUxC1UJNLCB0DisIKzg_-s1za3EFqK1JZDw9myvS_UzcYOtpeq3767pAfEgdNcZubN-52ik5giIPSWkiWlRH_crFdflowwvuRMtpqqF2hBNZe4pYKeoAVhUmFCJHmFTku5J4S2gukF2t0ewg5uw_5Ts4oNxB7XhCdp1ml_GCvgEPE17FN-bC5t7h9shub8tx1GW0OKzSalodmm3HyG6O_2Nu9C_NnMnbPewJjtMEl9SHlXXqOXWzsUePOsZ-jHxflmfYmvvn_9tl5dYc8Zrdj10rK2B6qUbJXzWnekB-EAoHdCaK86cA4cdZRx0Wvbed3LzvlOgNRW8zP0_tibSg2m-FDB3_kUI_hqmJBaMT6ZPhxNh5x-jVCquU9jjtMuw5TUXDHRzlX06PI5lZJhaw45TG8-GkrMDN7M4M0M3jyDnzLyn8y04A-umm0Y_pt8d0yG6de_LlHGOib5E8ZVkzM
CODEN	ITCSDI
CitedBy_id	crossref_primary_10_3389_fnins_2023_1233037 crossref_primary_10_1109_ACCESS_2025_3588665 crossref_primary_10_1109_TETC_2024_3480524 crossref_primary_10_1109_TVLSI_2023_3327417 crossref_primary_10_3389_fnins_2024_1420119 crossref_primary_10_1002_smll_202505708 crossref_primary_10_1002_aisy_202300456 crossref_primary_10_1016_j_neucom_2025_130539 crossref_primary_10_1016_j_mee_2025_112408 crossref_primary_10_1109_TCASAI_2025_3536379 crossref_primary_10_1109_JETCAS_2023_3327748 crossref_primary_10_1038_s44172_025_00492_5 crossref_primary_10_1063_5_0211040 crossref_primary_10_3389_fnins_2025_1593580 crossref_primary_10_3390_brainsci13091316 crossref_primary_10_1016_j_mejo_2024_106377
Cites_doi	10.1038/s41928-018-0023-2 10.1109/ISCA45697.2020.00038 10.5573/JSTS.2014.14.3.356 10.1145/3476999 10.1109/MM.2018.112130359 10.3389/fncom.2015.00099 10.1109/ISCAS48785.2022.9937336 10.1145/3061639.3062311 10.1109/SEAA.2018.00069 10.1145/2744769.2744930 10.1109/TC.2022.3174585 10.1007/978-3-030-58607-2_23 10.1109/IJCNN.2015.7280696 10.1109/TVLSI.2019.2929245 10.1109/JSSC.2016.2616357 10.3389/fnins.2017.00682 10.1109/ICASSP43922.2022.9747906 10.1109/HPCA53966.2022.00031 10.1109/IRPS46558.2021.9405092 10.1109/ISLPED.2017.8009177 10.3389/fnins.2018.00331 10.1109/TCAD.2015.2474396 10.1109/TCAD.2021.3109857 10.1145/3531437.3539729 10.1038/s41586-019-1677-2 10.1109/DAC18072.2020.9218688 10.3389/fnins.2017.00350 10.1109/TCAD.2018.2789723 10.1063/1.5113536 10.1145/3576195 10.1021/nl203687n 10.1109/TCAD.2020.3000185 10.1109/ISPASS.2013.6557149 10.1109/TCAD.2021.3138347 10.1109/IEDM13553.2020.9371937 10.1145/3007787.3001139 10.1145/3297858.3304049 10.1109/ACCESS.2019.2954753 10.3389/fnins.2021.773954 10.1016/j.neunet.2021.09.022 10.3389/fnins.2019.00095
ContentType	Journal Article
Copyright	Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023
Copyright_xml	– notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023
CorporateAuthor	Yale Univ., New Haven, CT (United States)
CorporateAuthor_xml	– name: Yale Univ., New Haven, CT (United States)
DBID	97E RIA RIE AAYXX CITATION 7SC 7SP 8FD JQ2 L7M L~C L~D OTOTI
DOI	10.1109/TCAD.2023.3274918
DatabaseName	IEEE All-Society Periodicals Package (ASPP) 2005–Present IEEE All-Society Periodicals Package (ASPP) 1998–Present IEEE Electronic Library (IEL) CrossRef Computer and Information Systems Abstracts Electronics & Communications Abstracts Technology Research Database ProQuest Computer Science Collection Advanced Technologies Database with Aerospace Computer and Information Systems Abstracts Academic Computer and Information Systems Abstracts Professional OSTI.GOV
DatabaseTitle	CrossRef Technology Research Database Computer and Information Systems Abstracts – Academic Electronics & Communications Abstracts ProQuest Computer Science Collection Computer and Information Systems Abstracts Advanced Technologies Database with Aerospace Computer and Information Systems Abstracts Professional
DatabaseTitleList	Technology Research Database
Database_xml	– sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher
DeliveryMethod	fulltext_linktorsrc
Discipline	Engineering Computer Science
EISSN	1937-4151
EndPage	1
ExternalDocumentID	2579823 10_1109_TCAD_2023_3274918 10122627
Genre	orig-research
GroupedDBID	--Z -~X 0R~ 29I 4.4 5GY 6IK 97E AAJGR AARMG AASAJ AAWTH ABAZT ABQJQ ABVLG ACGFS ACIWK ACNCT AENEX AGQYO AHBIQ AKJIK AKQYR ALMA_UNASSIGNED_HOLDINGS ASUFR ATWAV BEFXN BFFAM BGNUA BKEBE BPEOZ CS3 DU5 EBS HZ~ IFIPE IPLJI JAVBF LAI M43 O9- OCL P2P PZZ RIA RIE RNS TN5 5VS AAYXX AETIX AGSQL AI. AIBXA ALLEH CITATION EJD H~9 IBMZZ ICLAB IFJZH VH1 VJK 7SC 7SP 8FD JQ2 L7M L~C L~D OTOTI
ID	FETCH-LOGICAL-c321t-bd7a24de188748bc9960de5beeedb559c86ebbeb1b1235d9a6c9d76bc65e79a93
IEDL.DBID	RIE
ISICitedReferencesCount	15
ISICitedReferencesURI	http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=001098114300026&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
ISSN	0278-0070
IngestDate	Mon Aug 25 02:20:59 EDT 2025 Mon Jun 30 08:35:24 EDT 2025 Tue Nov 18 22:44:19 EST 2025 Sat Nov 29 03:31:52 EST 2025 Wed Aug 27 02:18:21 EDT 2025
IsPeerReviewed	true
IsScholarly	true
Issue	11
Language	English
License	https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html https://doi.org/10.15223/policy-029 https://doi.org/10.15223/policy-037
LinkModel	DirectLink
MergedId	FETCHMERGED-LOGICAL-c321t-bd7a24de188748bc9960de5beeedb559c86ebbeb1b1235d9a6c9d76bc65e79a93
Notes	ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 SC0023198 None USDOE Office of Science (SC)
ORCID	0000-0002-7721-271X 0000-0002-4167-6782 0000-0001-6968-1180 0000-0002-0534-5206 0000-0003-1813-1140 0009-0007-1869-8653 0000000318131140 0000000241676782 0000000169681180 0000000205345206 000000027721271X 0009000718698653
PQID	2879382549
PQPubID	85470
PageCount	1
ParticipantIDs	crossref_primary_10_1109_TCAD_2023_3274918 ieee_primary_10122627 proquest_journals_2879382549 crossref_citationtrail_10_1109_TCAD_2023_3274918 osti_scitechconnect_2579823
PublicationCentury	2000
PublicationDate	2023-11-01
PublicationDateYYYYMMDD	2023-11-01
PublicationDate_xml	– month: 11 year: 2023 text: 2023-11-01 day: 01
PublicationDecade	2020
PublicationPlace	New York
PublicationPlace_xml	– name: New York – name: United States
PublicationTitle	IEEE transactions on computer-aided design of integrated circuits and systems
PublicationTitleAbbrev	TCAD
PublicationYear	2023
Publisher	IEEE The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher_xml	– name: IEEE – name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
References	ref13 ref35 ref12 ref15 ref37 ref14 ref36 le (ref28) 2015 ref31 ref30 ref11 ref33 ref10 ref32 yin (ref19) 2022 ref2 ref1 ref17 ref39 ref16 ref38 ref18 li (ref34) 2021 ref24 ref46 ref23 ref26 ref25 ref20 ref42 ref22 ref44 ref21 ref43 hajri (ref45) 2019; 7 krizhevsky (ref27) 2009 ref29 ref8 ref7 ref9 ref4 ref3 ref6 ref5 bhattacharjee (ref41) 2021 ref40
References_xml	– ident: ref23 doi: 10.1038/s41928-018-0023-2 – ident: ref6 doi: 10.1109/ISCA45697.2020.00038 – ident: ref25 doi: 10.5573/JSTS.2014.14.3.356 – ident: ref17 doi: 10.1145/3476999 – ident: ref4 doi: 10.1109/MM.2018.112130359 – ident: ref30 doi: 10.3389/fncom.2015.00099 – ident: ref43 doi: 10.1109/ISCAS48785.2022.9937336 – ident: ref9 doi: 10.1145/3061639.3062311 – ident: ref15 doi: 10.1109/SEAA.2018.00069 – ident: ref39 doi: 10.1145/2744769.2744930 – ident: ref22 doi: 10.1109/TC.2022.3174585 – ident: ref33 doi: 10.1007/978-3-030-58607-2_23 – ident: ref32 doi: 10.1109/IJCNN.2015.7280696 – year: 2022 ident: ref19 article-title: SATA: Sparsity-aware training accelerator for spiking neural networks publication-title: IEEE Trans Comput -Aided Design Integr Circuits Syst – year: 2015 ident: ref28 publication-title: Tiny imagenet visual recognition challenge – ident: ref44 doi: 10.1109/TVLSI.2019.2929245 – ident: ref13 doi: 10.1109/JSSC.2016.2616357 – start-page: 884 year: 2021 ident: ref41 article-title: Efficiency-driven hardware otimization for adversarially robust neural networks publication-title: Proc DATE – ident: ref35 doi: 10.3389/fnins.2017.00682 – ident: ref37 doi: 10.1109/ICASSP43922.2022.9747906 – ident: ref7 doi: 10.1109/HPCA53966.2022.00031 – ident: ref21 doi: 10.1109/IRPS46558.2021.9405092 – ident: ref10 doi: 10.1109/ISLPED.2017.8009177 – year: 2009 ident: ref27 article-title: Learning multiple layers of features from tiny images – ident: ref36 doi: 10.3389/fnins.2018.00331 – ident: ref5 doi: 10.1109/TCAD.2015.2474396 – ident: ref40 doi: 10.1109/TCAD.2021.3109857 – ident: ref26 doi: 10.1145/3531437.3539729 – ident: ref1 doi: 10.1038/s41586-019-1677-2 – ident: ref20 doi: 10.1109/DAC18072.2020.9218688 – ident: ref2 doi: 10.3389/fnins.2017.00350 – ident: ref14 doi: 10.1109/TCAD.2018.2789723 – ident: ref11 doi: 10.1063/1.5113536 – ident: ref42 doi: 10.1145/3576195 – ident: ref8 doi: 10.1021/nl203687n – ident: ref16 doi: 10.1109/TCAD.2020.3000185 – ident: ref46 doi: 10.1109/ISPASS.2013.6557149 – ident: ref18 doi: 10.1109/TCAD.2021.3138347 – ident: ref24 doi: 10.1109/IEDM13553.2020.9371937 – ident: ref29 doi: 10.1145/3007787.3001139 – year: 2021 ident: ref34 article-title: A free lunch from ANN: Towards efficient, accurate spiking neural networks calibration publication-title: arXiv 2106 06984 – ident: ref12 doi: 10.1145/3297858.3304049 – volume: 7 start-page: 168963 year: 2019 ident: ref45 article-title: RRAM device models: A comparative analysis with experimental validation publication-title: IEEE Access doi: 10.1109/ACCESS.2019.2954753 – ident: ref38 doi: 10.3389/fnins.2021.773954 – ident: ref3 doi: 10.1016/j.neunet.2021.09.022 – ident: ref31 doi: 10.3389/fnins.2019.00095
SSID	ssj0014529
Score	2.5335732
Snippet	Spiking Neural Networks (SNNs) are an active research domain towards energy efficient machine intelligence. Compared to conventional artificial neural networks... Spiking neural networks (SNNs) are an active research domain toward energy-efficient machine intelligence. Compared to conventional artificial neural networks... Not provided.
SourceID	osti proquest crossref ieee
SourceType	Open Access Repository Aggregation Database Enrichment Source Index Database Publisher
StartPage	1
SubjectTerms	Analog Crossbars Artificial neural networks Benchmark testing Biological neural networks Computation Computer architecture Computer memory Computer Science Data communication Data processing Emerging Devices Energy efficiency Engineering Engines Hardware In-Memory Computing Modules Network latency Neural networks Neurons Spiking Neural Networks (SNNs)
Title	SpikeSim: An end-to-end Compute-in-Memory Hardware Evaluation Tool for Benchmarking Spiking Neural Networks
URI	https://ieeexplore.ieee.org/document/10122627 https://www.proquest.com/docview/2879382549 https://www.osti.gov/biblio/2579823
Volume	42
WOSCitedRecordID	wos001098114300026&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText	1
inHoldings	1
isFullTextHit
isPrint
journalDatabaseRights	– providerCode: PRVIEE databaseName: IEEE Electronic Library (IEL) customDbUrl: eissn: 1937-4151 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0014529 issn: 0278-0070 databaseCode: RIE dateStart: 19820101 isFulltext: true titleUrlDefault: https://ieeexplore.ieee.org/ providerName: IEEE
link	http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3NS-wwEA8qHvTg8xPXL3LwJGRt2po076aieHERXMFbaCYRF7WV3erj_ffOpHVZEAVP6aHNR2cymcnM_IaxwwzlYimdEvmDBJFLr3BLaRB0NEFwKncZxGITejAo7u_NTZesHnNhQggx-Cz06TH68n0Nb3RVdkxYVKlK9Tyb11q1yVpTlwF5EOOFCkHGIiN3LkyZmOMhrqpPdcL7GRphhgp8zBxCsaoKNjXuqS8SOR4zl39-OcFVttLpk_y0ZYA1NheqdbY8gzK4wZ5uX0dP4Xb08pefVjxUXjS1wIZ3FR3EqBLXFHD7n5Mf_185DvxiCgLOh3X9zFG15WfI0I8vZbxc59QntQTugeMP2mjyySa7u7wYnl-JrsaCgCyVjXBel2nug0RhkxcOCKzFhxOHS_MOrQ0oVHAOBbqjpFpvSgXGa-VAnQRtSpNtsYWqrsI246j6PDgpQULic10krkhzVToNKUChIeux5POnW-gAyKkOxrONhkhiLNHJEp1sR6ceO5p-8tqib_z08iZRZObFlhg9tkuktahSEC4uUAARNBZllSlSnNXeJ8Vtt30nFs1Ik0XbeeebTnfZEo3dZiXusYVm_Bb22SK8N6PJ-CBy5geykOAx
linkProvider	IEEE
linkToHtml	http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3dT9wwDI-ATWJ72BdM3IAtD3ualKNpc0mzNzaBQIPTJG4Sb1HjBHECWnRXmPbfz07L6aRpSDylD2ma1I5jx_bPjH0uUC5W0muhLiQIJYPGLWVA0NEE0WvlC0jFJsx4XJ6f2599snrKhYkxpuCzOKTH5MsPDdzRVdkeYVHlOjer7NlIqTzr0rUWTgPyIaYrFQKNRVbunZgys3sTXNeQKoUPCzTDLJX4WDqGUl0VbBrcVf_I5HTQHL5-4hTfsFe9Rsn3OxZ4y1Zi_Y69XMIZ3GBXZ7fTq3g2vfnK92se6yDaRmDD-5oOYlqLUwq5_cPJk_-7mkV-sIAB55Omueao3PJvyNKXN1W6Xuc0JrUE74HfH3fx5PNN9uvwYPL9SPRVFgQUuWyFD6bKVYgSxY0qPRBcS4gjj0sLHu0NKHX0HkW6p7TaYCsNNhjtQY-isZUt3rO1uqnjFuOo_Fx4KUFCFpQpM1_mSlfeQA5QGigGLHv46Q56CHKqhHHtkimSWUd0ckQn19NpwL4sXrnt8Dce67xJFFnq2BFjwLaJtA6VCkLGBQohgtahtLJljrPaeaC46zfw3KEhaYtkPX_4z6Cf2PrR5PTEnRyPf2yzFzSPLkdxh621s7u4y57DfTudzz4mLv0LgaDjeA
openUrl	ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=SpikeSim%3A+An+end-to-end+Compute-in-Memory+Hardware+Evaluation+Tool+for+Benchmarking+Spiking+Neural+Networks&rft.jtitle=IEEE+transactions+on+computer-aided+design+of+integrated+circuits+and+systems&rft.au=Moitra%2C+Abhishek&rft.au=Bhattacharjee%2C+Abhiroop&rft.au=Kuang%2C+Runcong&rft.au=Krishnan%2C+Gokul&rft.date=2023-11-01&rft.pub=IEEE&rft.issn=0278-0070&rft.spage=1&rft.epage=1&rft_id=info:doi/10.1109%2FTCAD.2023.3274918&rft.externalDocID=10122627
thumbnail_l	http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0278-0070&client=summon
thumbnail_m	http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0278-0070&client=summon
thumbnail_s	http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0278-0070&client=summon