APA (7th ed.) Citation

Bhatti, F., & Greiner, T. (2021). Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm. Algorithms, 14(7), 215. https://doi.org/10.3390/a14070215

Chicago Style (17th ed.) Citation

Bhatti, Faraz, and Thomas Greiner. "Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm." Algorithms 14, no. 7 (2021): 215. https://doi.org/10.3390/a14070215.

MLA (9th ed.) Citation

Bhatti, Faraz, and Thomas Greiner. "Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm." Algorithms, vol. 14, no. 7, 2021, p. 215, https://doi.org/10.3390/a14070215.