Bhatti, F., & Greiner, T. (2021). Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm. Algorithms, 14(7), 215. https://doi.org/10.3390/a14070215
Citácia podle Chicago (17th ed.)Bhatti, Faraz, a Thomas Greiner. "Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm." Algorithms 14, no. 7 (2021): 215. https://doi.org/10.3390/a14070215.
Citácia podľa MLA (8th ed.)Bhatti, Faraz, a Thomas Greiner. "Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm." Algorithms, vol. 14, no. 7, 2021, p. 215, https://doi.org/10.3390/a14070215.
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