AEQUAM: Accelerating Quantum Algorithm Validation Through FPGA-Based Emulation

This work presents AEQUAM (Area Efficient QUAntum eMulation), a toolchain that enables faster and more accessible quantum circuit verification. It consists of a compiler that translates OpenQASM 2.0 into RISC-like instructions, Cython software models for selecting number representations and simulati...

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Vydané v:	IEEE access Ročník 13; s. 130232 - 130255
Hlavní autori:	Lagostina, Lorenzo, Volpe, Deborah, Zamboni, Maurizio, Turvani, Giovanna
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	Piscataway IEEE 2025 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Computer architecture Emulation Emulators field programmable gate array Field programmable gate arrays Hardware description languages Logic gates Quantum algorithm quantum algorithm verification Quantum circuit Quantum computing Quantum computing emulation quantum computing simulation Quantum mechanics Quantum state Qubit Qubits (quantum computing) Representations User requirements Vectors
ISSN:	2169-3536, 2169-3536
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