Effective SIMD Vectorization for Intel Xeon Phi Coprocessors
Efficiently exploiting SIMD vector units is one of the most important aspects in achieving high performance of the application code running on Intel Xeon Phi coprocessors. In this paper, we present several effective SIMD vectorization techniques such as less-than-full-vector loop vectorization, Inte...
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| Vydáno v: | Scientific programming Ročník 2015; číslo 2015; s. 1 - 14 |
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| Jazyk: | angličtina |
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Cairo, Egypt
Hindawi Publishing Corporation
01.01.2015
John Wiley & Sons, Inc |
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| ISSN: | 1058-9244, 1875-919X |
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| Abstract | Efficiently exploiting SIMD vector units is one of the most important aspects in achieving high performance of the application code running on Intel Xeon Phi coprocessors. In this paper, we present several effective SIMD vectorization techniques such as less-than-full-vector loop vectorization, Intel MIC specific alignment optimization, and small matrix transpose/multiplication 2D vectorization implemented in the Intel C/C++ and Fortran production compilers for Intel Xeon Phi coprocessors. A set of workloads from several application domains is employed to conduct the performance study of our SIMD vectorization techniques. The performance results show that we achieved up to 12.5x performance gain on the Intel Xeon Phi coprocessor. We also demonstrate a 2000x performance speedup from the seamless integration of SIMD vectorization and parallelization. |
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| AbstractList | Efficiently exploiting SIMD vector units is one of the most important aspects in achieving high performance of the application code running on Intel Xeon Phi coprocessors. In this paper, we present several effective SIMD vectorization techniques such as less-than-full-vector loop vectorization, Intel MIC specific alignment optimization, and small matrix transpose/multiplication 2D vectorization implemented in the Intel C/C++ and Fortran production compilers for Intel Xeon Phi coprocessors. A set of workloads from several application domains is employed to conduct the performance study of our SIMD vectorization techniques. The performance results show that we achieved up to 12.5x performance gain on the Intel Xeon Phi coprocessor. We also demonstrate a 2000x performance speedup from the seamless integration of SIMD vectorization and parallelization. |
| Author | Saito, Hideki Masten, Matt Kozhukhov, Sergey S. Garcia, Eric N. Cherkasov, Aleksei G. Panchenko, Nikolay Preis, Serguei V. Tian, Xinmin |
| Author_xml | – sequence: 1 fullname: Panchenko, Nikolay – sequence: 2 fullname: Masten, Matt – sequence: 3 fullname: Kozhukhov, Sergey S. – sequence: 4 fullname: Garcia, Eric N. – sequence: 5 fullname: Preis, Serguei V. – sequence: 6 fullname: Saito, Hideki – sequence: 7 fullname: Tian, Xinmin – sequence: 8 fullname: Cherkasov, Aleksei G. |
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| Copyright | Copyright © 2015 Xinmin Tian et al. Copyright © 2015 Xinmin Tian et al.; This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. |
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Efficient SIMD code generation for runtime alignment and length conversion Proceedings of the International Symposium on Code Generation and Optimization (CGO '05) March 2005 153 164 10.1109/CGO.2005.18 – reference: Shin J. Hall M. Chame J. Superword-level parallelism in the presence of control flow Proceedings of the International Symposium on Code Generation and Optimization (CGO '05) March 2005 IEEE Computer Society 165 175 10.1109/CGO.2005.33 2-s2.0-33646554301 – reference: Nuzman D. Henderson R. Multi-platform auto-vectorization Proceedings of the 4th International Symposium on Code Generation and Optimization (CGO '06) March 2006 New York, NY, USA 281 294 10.1109/cgo.2006.25 2-s2.0-79953275887 – reference: Crescent Bay Software VAST-F/AltiVec: Automatic Fortran Vectorizer for PowerPC Vector Unit 2004 – reference: Cheong G. Lam M. S. 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Gravitational N-Body Simulations: Tools and Algorithm 2003 Cambridge, UK Cambridge University Press Cambridge Monographs on Mathematical Physics MR2176386 10.1017/cbo9780511535246 – reference: Larsen S. Amarasinghe S. Exploiting superword level parallelism with multimedia instruction sets Proceedings of the SIGPLAN Conference on Programming Language Design and Implementation (PLDI '00) June 2000 145 156 2-s2.0-0034446825 – volume: 30 start-page: 65 issue: 2 year: 2002 end-page: 98 ident: 5 article-title: Automatic intra-register vectorization for the intel architecture – reference: Lu H. J. Garkar M. Matz M. Hubicka J. Jaeger A. Mitchell M. System V Application Binary Interface K1OM Architecture Processor Supplement Version 1.0, 2012, http://software.intel.com/en-us/forums/topic/278102 – reference: Eichenberger A. E. O'Brien K. Wu P. Chen T. Oden P. H. Prener D. A. Shepherd J. C. So B. Sura Z. Wang A. Zhang T. Zhao P. Gschwind M. Optimizing compiler for the CELL processor Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT '05) September 2005 St. Louis, Mo, USA IEEE 161 172 10.1109/pact.2005.33 2-s2.0-33646009337 – reference: Kachelrieb M. Knaup M. Bockenbach O. Hyperfast perspective cone-beam backprojection Proceedings of the IEEE Nuclear Science Symposium Conference Record November 2006 1679 1683 10.1109/nssmic.2006.354221 2-s2.0-38649087090 – volume: 36 start-page: 571 issue: 6 year: 2008 end-page: 591 ident: 6 article-title: A case study on compiler optimizations for the Intel Core 2 duo processor – reference: Intel Corporation Intel Xeon Phi Coprocessor System Software Developers Guide 2012, http://software.intel.com/en-us/mic-developer – reference: Tian X. Saito H. Girkar M. Preis S. V. Kozhukhov S. S. Cherkasov A. G. Nelson C. Panchenko N. Geva R. Compiling C/C++ SIMD extensions for function and loop vectorizaion on multicore-SIMD processors Proceedings of the IEEE 26th International Parallel and Distributed Processing Symposium Workshops (IPDPSW '12) May 2012 2349 2358 2-s2.0-84867424986 10.1109/ipdpsw.2012.292 – reference: Klemm M. Duran A. Tian X. Saito H. Caballero D. Martorell X. Extending OpenMP* with vector constructs for modern multicore SIMD architectures OpenMP in a Heterogeneous World: 8th International Workshop on OpenMP, IWOMP 2012, Rome, Italy, June 11–13, 2012. Proceedings 2012 Berlin, Germany Springer 59 72 Lecture Notes in Computer Science 10.1007/978-3-642-30961-8_5 – ident: 4 doi: 10.1007/s10766-008-0071-8 – year: 2004 ident: 6 – ident: 13 doi: 10.1007/978-3-642-30961-8_5 – year: 2011 ident: 10 – ident: 1 doi: 10.1017/cbo9780511535246 – ident: 2 doi: 10.1145/29873.29875 – ident: 3 doi: 10.1023/a:1014230429447 – start-page: 521 volume-title: ‘N-body’ problems in statistical learning year: 2000 ident: 8 |
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| Title | Effective SIMD Vectorization for Intel Xeon Phi Coprocessors |
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