Efficient Large-Width Montgomery Modular Multiplier Design Based on Toom–Cook-5
Toom–Cook-n multiplication is an efficient large-width multiplication algorithm based on a divide-and-conquer strategy, widely used in modular multiplication operations for cryptographic algorithms. Theoretically, as the degree n increases, Toom–Cook-n can split the multiplicands into more sub-terms...
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| Published in: | Electronics (Basel) Vol. 14; no. 7; p. 1402 |
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| Abstract | Toom–Cook-n multiplication is an efficient large-width multiplication algorithm based on a divide-and-conquer strategy, widely used in modular multiplication operations for cryptographic algorithms. Theoretically, as the degree n increases, Toom–Cook-n can split the multiplicands into more sub-terms to further enhance the performance of the multiplier. However, constrained by the computational burden brought by the growing size of the interpolation matrix as the degree increases, current research predominantly focuses on Toom–Cook-4 and Toom–Cook-3. This paper proposes a Montgomery modular multiplication design based on Toom–Cook-5, which alleviates the computational difficulty of the interpolation step by introducing an interpolation matrix pre-simplification strategy. Additionally, the design incorporates and optimizes carry–save adder and Karatsuba multiplication, enabling Toom–Cook-5 multiplication to be applied in practical and efficient hardware implementation. This paper presents the ASIC implementation results of the hardware architecture under a 90nm process, demonstrating superior performance compared to previous works. |
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| AbstractList | Toom–Cook-n multiplication is an efficient large-width multiplication algorithm based on a divide-and-conquer strategy, widely used in modular multiplication operations for cryptographic algorithms. Theoretically, as the degree n increases, Toom–Cook-n can split the multiplicands into more sub-terms to further enhance the performance of the multiplier. However, constrained by the computational burden brought by the growing size of the interpolation matrix as the degree increases, current research predominantly focuses on Toom–Cook-4 and Toom–Cook-3. This paper proposes a Montgomery modular multiplication design based on Toom–Cook-5, which alleviates the computational difficulty of the interpolation step by introducing an interpolation matrix pre-simplification strategy. Additionally, the design incorporates and optimizes carry–save adder and Karatsuba multiplication, enabling Toom–Cook-5 multiplication to be applied in practical and efficient hardware implementation. This paper presents the ASIC implementation results of the hardware architecture under a 90nm process, demonstrating superior performance compared to previous works. |
| Audience | Academic |
| Author | Hao, Yue Wang, Xiaohua Liu, Kuanhao Wang, Weijiang Zhang, Jingqi |
| Author_xml | – sequence: 1 givenname: Kuanhao surname: Liu fullname: Liu, Kuanhao – sequence: 2 givenname: Xiaohua surname: Wang fullname: Wang, Xiaohua – sequence: 3 givenname: Yue orcidid: 0000-0002-6084-1544 surname: Hao fullname: Hao, Yue – sequence: 4 givenname: Jingqi orcidid: 0000-0003-4140-7029 surname: Zhang fullname: Zhang, Jingqi – sequence: 5 givenname: Weijiang surname: Wang fullname: Wang, Weijiang |
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| Cites_doi | 10.1109/TCSI.2018.2878598 10.17487/rfc5639 10.1109/TVLSI.2012.2227846 10.1109/TVLSI.2021.3058509 10.1109/TCSI.2024.3435473 10.1109/IRETELC.1962.5407919 10.1090/S0025-5718-1985-0777282-X 10.3390/electronics11223712 10.1109/TVLSI.2010.2049037 10.1145/359340.359342 10.1109/ACCESS.2023.3252504 10.3390/electronics11071131 10.23919/DATE.2019.8715287 10.1109/TC.2010.93 10.1109/TCSI.2023.3332880 10.1090/S0002-9947-1969-0249212-8 10.6028/NIST.SP.800-57p3 10.1109/TVLSI.2015.2409113 10.1109/MM.2005.24 10.1103/PhysRevA.98.012311 10.6028/NIST.SP.800-57p1r3 10.1109/TVLSI.2023.3277865 10.1109/CISE.2010.5676912 |
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| Snippet | Toom–Cook-n multiplication is an efficient large-width multiplication algorithm based on a divide-and-conquer strategy, widely used in modular multiplication... |
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| SubjectTerms | Algorithms Design Efficiency Hardware Interpolation Multipliers Optimization Performance enhancement |
| Title | Efficient Large-Width Montgomery Modular Multiplier Design Based on Toom–Cook-5 |
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