Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing

This paper presents an evolvable hardware system, fully contained in an FPGA, which is capable of autonomously generating digital processing circuits, implemented on an array of processing elements (PEs). Candidate circuits are generated by an embedded evolutionary algorithm and implemented by means...

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Vydané v:IEEE transactions on computers Ročník 62; číslo 8; s. 1481 - 1493
Hlavní autori: Salvador, R., Otero, A., Mora, J., de la Torre, E., Riesgo, T., Sekanina, L.
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: New York IEEE 01.08.2013
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:
adaptable architectures
Adaptive systems
Arrays
autonomous systems
Circuits
Evolutionary computing
evolutionary computing and genetic algorithms
Evolvable hardware
Filtering
Filtration
FPGAs
Genetic algorithms
Logic
reconfigurable hardware
Reconfiguration
self-adaptive systems
Self-organizing networks
Studies
ISSN:0018-9340, 1557-9956
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Abstract This paper presents an evolvable hardware system, fully contained in an FPGA, which is capable of autonomously generating digital processing circuits, implemented on an array of processing elements (PEs). Candidate circuits are generated by an embedded evolutionary algorithm and implemented by means of dynamic partial reconfiguration, enabling evaluation in the final hardware. The PE array follows a systolic approach, and PEs do not contain extra logic such as path multiplexers or unused logic, so array performance is high. Hardware evaluation in the target device and the fast reconfiguration engine used yield smaller reconfiguration than evaluation times. This means that the complete evaluation cycle is faster than software-based approaches and previous evolvable digital systems. The selected application is digital image filtering and edge detection. The evolved filters yield better quality than classic linear and nonlinear filters using mean absolute error as standard comparison metric. Results do not only show better circuit adaptation to different noise types and intensities, but also a nondegrading filtering behavior. This means they may be run iteratively to enhance filtering quality. These properties are even kept for high noise levels (40 percent). The system as a whole is a step toward fully autonomous, adaptive systems.
AbstractList This paper presents an evolvable hardware system, fully contained in an FPGA, which is capable of autonomously generating digital processing circuits, implemented on an array of processing elements (PEs). Candidate circuits are generated by an embedded evolutionary algorithm and implemented by means of dynamic partial reconfiguration, enabling evaluation in the final hardware. The PE array follows a systolic approach, and PEs do not contain extra logic such as path multiplexers or unused logic, so array performance is high. Hardware evaluation in the target device and the fast reconfiguration engine used yield smaller reconfiguration than evaluation times. This means that the complete evaluation cycle is faster than software-based approaches and previous evolvable digital systems. The selected application is digital image filtering and edge detection. The evolved filters yield better quality than classic linear and nonlinear filters using mean absolute error as standard comparison metric. Results do not only show better circuit adaptation to different noise types and intensities, but also a nondegrading filtering behavior. This means they may be run iteratively to enhance filtering quality. These properties are even kept for high noise levels (40 percent). The system as a whole is a step toward fully autonomous, adaptive systems.
Author Salvador, R.
de la Torre, E.
Otero, A.
Mora, J.
Riesgo, T.
Sekanina, L.
Author_xml – sequence: 1
  givenname: R.
  surname: Salvador
  fullname: Salvador, R.
  email: ruben.salvador@upm.es
  organization: Dept. de Sist. Electronicos y de Control, Univ. Politec. de Madrid, Madrid, Spain
– sequence: 2
  givenname: A.
  surname: Otero
  fullname: Otero, A.
  email: joseandres.otero@upm.es
  organization: Centro de Electron. Ind., Univ. Politec. de Madrid, Madrid, Spain
– sequence: 3
  givenname: J.
  surname: Mora
  fullname: Mora, J.
  email: javier.morad@upm.es
  organization: Centro de Electron. Ind., Univ. Politec. de Madrid, Madrid, Spain
– sequence: 4
  givenname: E.
  surname: de la Torre
  fullname: de la Torre, E.
  email: eduardo.delatorre@upm.es
  organization: Centro de Electron. Ind., Univ. Politec. de Madrid, Madrid, Spain
– sequence: 5
  givenname: T.
  surname: Riesgo
  fullname: Riesgo, T.
  email: teresa.riesgo@upm.es
  organization: Centro de Electron. Ind., Univ. Politec. de Madrid, Madrid, Spain
– sequence: 6
  givenname: L.
  surname: Sekanina
  fullname: Sekanina, L.
  email: sekanina@fit.vutbr.cz
  organization: IT4Innovations Centre of Excellence, Brno Univ. of Technol., Brno, Czech Republic
BookMark eNptkM9LwzAYhoNMcJtevHopeBGhMz_aJjmOMd1woLh5Dln7ZWS0zUzayf57OycexNP3HJ735eMdoF7takDomuARIVg-rCYjigkbcXGG-iRNeSxlmvVQH2MiYskSfIEGIWwxxhnFso-el1Ca-A1yVxu7ab1elxBN967cf9NM--JTe4iWh9BAFRnno3Ghd43dQzSv9AaiV-9yCMHWm0t0bnQZ4OrnDtH743Q1mcWLl6f5ZLyIc0ZoE68LmhqcAjGSFtwIXrDE0AI4kx0anZtEAzOppkJmHfKMgADJTVEwIvCaDdHdqXfn3UcLoVGVDTmUpa7BtUGRjBMmGBW0U2__qFvX-rr7ThHGuzkoFaSz7k9W7l0IHozaeVtpf1AEq-OuajVRx10VF52M_8i5bXRjXd14bcv_IzeniAWA3-4skUmaYfYFfsmEsQ
CODEN ITCOB4
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ContentType Journal Article
Copyright Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Aug 2013
Copyright_xml – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Aug 2013
DBID 97E
RIA
RIE
AAYXX
CITATION
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
F28
FR3
DOI 10.1109/TC.2013.78
DatabaseName IEEE Xplore (IEEE)
IEEE All-Society Periodicals Package (ASPP) 1998–Present
IEEE Electronic Library (IEL)
CrossRef
Computer and Information Systems Abstracts
Electronics & Communications Abstracts
Technology Research Database
ProQuest Computer Science Collection
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
ANTE: Abstracts in New Technology & Engineering
Engineering Research Database
DatabaseTitle CrossRef
Technology Research Database
Computer and Information Systems Abstracts – Academic
Electronics & Communications Abstracts
ProQuest Computer Science Collection
Computer and Information Systems Abstracts
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts Professional
Engineering Research Database
ANTE: Abstracts in New Technology & Engineering
DatabaseTitleList Technology Research Database
Technology Research Database
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
Computer Science
EISSN 1557-9956
EndPage 1493
ExternalDocumentID 3010478151
10_1109_TC_2013_78
6494560
Genre orig-research
GroupedDBID --Z
-DZ
-~X
.55
.DC
0R~
29I
3EH
3O-
4.4
5GY
5VS
6IK
85S
97E
AAJGR
AARMG
AASAJ
AAWTH
ABAZT
ABFSI
ABQJQ
ABVLG
ACGFO
ACIWK
ACNCT
AENEX
AETEA
AETIX
AGQYO
AGSQL
AHBIQ
AI.
AIBXA
AKJIK
AKQYR
ALLEH
ALMA_UNASSIGNED_HOLDINGS
ASUFR
ATWAV
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CS3
DU5
E.L
EBS
EJD
HZ~
H~9
IAAWW
IBMZZ
ICLAB
IEDLZ
IFIPE
IFJZH
IPLJI
JAVBF
LAI
M43
MS~
MVM
O9-
OCL
P2P
PQQKQ
RIA
RIE
RNI
RNS
RXW
RZB
TAE
TN5
TWZ
UHB
UKR
UPT
VH1
X7M
XJT
XOL
XZL
YXB
YYQ
YZZ
ZCG
AAYXX
ABUFD
CITATION
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
F28
FR3
ID FETCH-LOGICAL-c312t-bd25f05e1f92d7f87d34f2de7397d3facf4ae3f5a28964ae761e8e97fdd3180b3
IEDL.DBID RIE
ISICitedReferencesCount 34
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000321221000002&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
ISSN 0018-9340
IngestDate Sun Sep 28 09:09:32 EDT 2025
Sun Nov 09 08:20:51 EST 2025
Sat Nov 29 08:11:33 EST 2025
Tue Nov 18 21:37:43 EST 2025
Wed Aug 27 02:49:02 EDT 2025
IsPeerReviewed true
IsScholarly true
Issue 8
Language English
License https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c312t-bd25f05e1f92d7f87d34f2de7397d3facf4ae3f5a28964ae761e8e97fdd3180b3
Notes ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
content type line 23
PQID 1373402281
PQPubID 85452
PageCount 13
ParticipantIDs proquest_miscellaneous_1671383282
crossref_citationtrail_10_1109_TC_2013_78
crossref_primary_10_1109_TC_2013_78
ieee_primary_6494560
proquest_journals_1373402281
PublicationCentury 2000
PublicationDate 2013-08-01
PublicationDateYYYYMMDD 2013-08-01
PublicationDate_xml – month: 08
  year: 2013
  text: 2013-08-01
  day: 01
PublicationDecade 2010
PublicationPlace New York
PublicationPlace_xml – name: New York
PublicationTitle IEEE transactions on computers
PublicationTitleAbbrev TC
PublicationYear 2013
Publisher IEEE
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher_xml – name: IEEE
– name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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SSID ssj0006209
Score 2.2624507
Snippet This paper presents an evolvable hardware system, fully contained in an FPGA, which is capable of autonomously generating digital processing circuits,...
SourceID proquest
crossref
ieee
SourceType Aggregation Database
Enrichment Source
Index Database
Publisher
StartPage 1481
SubjectTerms adaptable architectures
Adaptive systems
Arrays
autonomous systems
Circuits
Evolutionary computing
evolutionary computing and genetic algorithms
Evolvable hardware
Filtering
Filtration
FPGAs
Genetic algorithms
Logic
reconfigurable hardware
Reconfiguration
self-adaptive systems
Self-organizing networks
Studies
Title Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing
URI https://ieeexplore.ieee.org/document/6494560
https://www.proquest.com/docview/1373402281
https://www.proquest.com/docview/1671383282
Volume 62
WOSCitedRecordID wos000321221000002&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
journalDatabaseRights – providerCode: PRVIEE
  databaseName: IEEE Electronic Library (IEL)
  customDbUrl:
  eissn: 1557-9956
  dateEnd: 99991231
  omitProxy: false
  ssIdentifier: ssj0006209
  issn: 0018-9340
  databaseCode: RIE
  dateStart: 19680101
  isFulltext: true
  titleUrlDefault: https://ieeexplore.ieee.org/
  providerName: IEEE
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1La9wwEB7SkEN76DYvsm1aFJJLIU4syZbkY1h2aUkIgWwgN2NZoxBIvMu--vc70npNoLn0JvAgbI3m5Xl8AGfKCYFei0QKLJLMS5kYY9Okynml0LrM69gofKNvb83jY3G3BeddLwwixuIzvAjLmMt3k3oZfpVdqqwge08B-get1bpXq9O6alPOwUmAZZa2o0h5WlyOB6GES14EKLU3xieiqfyjgqNdGfX-742-wOfWf2RXa4bvwhY2e9DbYDOwVlT34NObQYP7cH2PLz4JoWbjn5-Ws9AvxYakmVZxFdL3f6oZsvX8ckaOLLty1TSoQvb7lVQOaxsKaLcDeBgNx4NfSQujkNSSi0Vinch9miP3hXDaG-1k5oVDTa6Ik76qfVah9HlFsZeipVYcDRbaO0cCn1p5CNvNpMEjYI7k31rFDRFk0kprkQixRh-wh_K6Dz8351vW7YzxAHXxUsZYIy3K8aAMvCi16cNpRztdT9Z4l2o_nHpH0R54H443bCtboZuXXGpivBCG9-Gke0ziEnIgVYOTJdEoisrpK4z4-v7O3-CjiIgXocbvGLYXsyV-h516tXiez37EO_cXjVfWyw
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1bS9xAFD6IFWwf6q2l23qZoi-CWTOXZCaPsiiK26XQFXwLmcwZEWxW1l3793tmNhsEffFtIIchmTPnlnP5AI5yJwR6LRIpsEiUlzIxxqZJlfEqR-uU17FReKhHI3N7W_xegZOuFwYRY_EZ9sMy5vLdpJ6HX2WnuSrI3lOA_iFTSqSLbq1O7-bLgg5OIixV2g4j5WlxOh6EIi7ZD2BqL8xPxFN5pYSjZbnYeN87bcLn1oNkZwuWb8EKNtuwsURnYK2wbsOnF6MGd-D6Dz74JASbjb-_m09DxxQ7J930HFchgf-vmiJbTDBn5MqyM1c9BmXIrv6S0mFtSwHt9gVuLs7Hg8ukBVJIasnFLLFOZD7NkPtCOO2NdlJ54VCTM-Kkr2qvKpQ-qyj6ymmpc44GC-2dI5FPrfwKq82kwW_AHGkAa3NuiEBJK61FIsQafUAfyuoeHC_Pt6zbKeMB7OKhjNFGWpTjQRl4UWrTg8OO9nExW-NNqp1w6h1Fe-A92F2yrWzF7qnkUhPjhTC8Bz-7xyQwIQtSNTiZE01OcTl9hRHf3975ANYvx7-G5fBqdP0DPoqIfxEq_nZhdTad4x6s1c-z-6fpfrx__wHeOtoS
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Self-Reconfigurable+Evolvable+Hardware+System+for+Adaptive+Image+Processing&rft.jtitle=IEEE+transactions+on+computers&rft.au=Salvador%2C+Ruben&rft.au=Otero%2C+Andres&rft.au=Mora%2C+Javier&rft.au=de+la+Torre%2C+Eduardo&rft.date=2013-08-01&rft.pub=The+Institute+of+Electrical+and+Electronics+Engineers%2C+Inc.+%28IEEE%29&rft.issn=0018-9340&rft.eissn=1557-9956&rft.volume=62&rft.issue=8&rft.spage=1481&rft_id=info:doi/10.1109%2FTC.2013.78&rft.externalDBID=NO_FULL_TEXT&rft.externalDocID=3010478151
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0018-9340&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0018-9340&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0018-9340&client=summon