A new method for designing multiplierless two-channel filterbank using shifted-Chebyshev polynomials

This paper presents an efficient design method for a digital multiplierless two-channel filterbank using the shifted-Chebyshev polynomials and common sub-expression elimination (CSE) algorithm for reducing hardware requirements such as adders and multipliers. For designing a two-channel filterbank,...

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Bibliographic Details
Published in:International journal of electronics Vol. 106; no. 4; pp. 537 - 552
Main Authors: Kumar, Anil, Sharma, Ila
Format: Journal Article
Language:English
Published: Taylor & Francis 03.04.2019
Subjects:
canonic sign digit
Filterbank
shifted-Chebyshev polynomial
sub-expression elimination
swarm algorithms
ISSN:0020-7217, 1362-3060
Online Access:Get full text
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Summary:This paper presents an efficient design method for a digital multiplierless two-channel filterbank using the shifted-Chebyshev polynomials and common sub-expression elimination (CSE) algorithm for reducing hardware requirements such as adders and multipliers. For designing a two-channel filterbank, the design problem is constructed as minimization of integral mean square error between the desired and designed response of a prototype filter in the passband and stopband. For controlling the performance in passband and stopband, two parameters (K P , and K S ) are used, whose optimum values are determined by swam optimization techniques such as differential evolution algorithm, artificial bee colony optimization, particle swarm optimizations, cuckoo search algorithm and hybrid method using a fitness function, constructed by perfect reconstruction condition of a filterbank. The number of polynomials used for approximation depends upon the order of a prototype filter. A new hybrid CSE is proposed for further reduction of hardware requirement. A comparative study of various CSE techniques such as horizontal, vertical and proposed hybrid CSE is also made. Numerical examples illustrate the effectiveness of the proposed algorithm in the reduction of adders with comparisons accomplished using existing methods. It has been found that almost 43% adder gain can be achieved when a filter is designed with N = 32 and wordlength (WL) as 12 using proposed methodology.
ISSN:0020-7217
1362-3060
DOI:10.1080/00207217.2018.1545257