Benchmarking parallel programming for single-board computers

Within the computing continuum, SBCs (single-board computers) are essential in the Edge and Fog, with many featuring multiple processing cores and GPU accelerators. In this way, parallel computing plays a crucial role in enabling the full computational potential of SBCs. However, selecting the best-...

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Vydáno v:Future generation computer systems Ročník 161; s. 119 - 134
Hlavní autoři: Hoffmann, Renato B., Griebler, Dalvan, Righi, Rodrigo da Rosa, Fernandes, Luiz G.
Médium: Journal Article
Jazyk:angličtina
Vydáno: Elsevier B.V 01.12.2024
Témata:
Computing continuum
Edge computing
Parallel computing
Performance analysis
Programming models
Parallel computing
Programming models
Performance analysis
Computing continuum
Edge computing
ISSN:0167-739X
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Shrnutí:Within the computing continuum, SBCs (single-board computers) are essential in the Edge and Fog, with many featuring multiple processing cores and GPU accelerators. In this way, parallel computing plays a crucial role in enabling the full computational potential of SBCs. However, selecting the best-suited solution in this context is inherently complex due to the intricate interplay between PPI (parallel programming interface) strategies, SBC architectural characteristics, and application characteristics and constraints. To our knowledge, no solution presents a combined discussion of these three aspects. To tackle this problem, this article aims to provide a benchmark of the best-suited parallelism PPIs given a set of hardware and application characteristics and requirements. Compared to existing benchmarks, we introduce new metrics, additional applications, various parallelism interfaces, and extra hardware devices. Therefore, our contributions are the methodology to benchmark parallelism on SBCs and the characterization of the best-performing parallelism PPIs and strategies for given situations. We are confident that parallel computing will be mainstream to process edge and fog computing; thus, our solution provides the first insights regarding what kind of application and parallel programming interface is the most suited for a particular SBC hardware. •Higher Last Level cache and memory bandwidth can increase parallelism scalability.•Heterogeneous hardware has better performance with dynamic resource allocation.•Graphical Processing Units require reducing kernel register usage in addition to memory footprint.•Static resource allocation increases performance with exceeding resources.•big.LITTLE cores increase stream processing performance.
ISSN:0167-739X
DOI:10.1016/j.future.2024.07.003