A Distributed Arithmetic based realization of the Least Mean Square Adaptive Decision Feedback Equalizer with Offset Binary Coding scheme

•An architecture for hardware implementation of least Mmean Ssquare (LMS) based adaptive decision feedback equlizer (ADFE) is presented.•The architecture is based on distributed arithmetic (DA) which is an efficient way of implementing the dot product of two vectors. DA architecture does not involve...

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Vydáno v:Signal processing Ročník 185; s. 108083
Hlavní autoři: Prakash, M. Surya, Ahamed, Shaik Rafi
Médium: Journal Article
Jazyk:angličtina
Vydáno: Elsevier B.V 01.08.2021
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ISSN:0165-1684
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Shrnutí:•An architecture for hardware implementation of least Mmean Ssquare (LMS) based adaptive decision feedback equlizer (ADFE) is presented.•The architecture is based on distributed arithmetic (DA) which is an efficient way of implementing the dot product of two vectors. DA architecture does not involve usage of hardware multipliers, instead uses look-up-table (memory) where the partial-products of elements of one of the vectors is stored.•ADFE which consists of feed-forward filter (FFF) and feedback filter (FBF) are realized using DA architecture. The partial-products of co-efficients of FFF and FBF are stored in separate look-up-tables (LUTs) which are labelled as FFF - LUT1 and FBF - LUT1 respectively.•Adaptation of FFF and FBF is performed using auxillary look-up-tables (LUTs) which are labelled as FFF - LUT2 and FBF - LUT2. These LUTs store the partial-products of input samples to the filters and the oldest sample is cleverly eliminated from these LUTs in every iteration. A Least-Mean-Square (LMS) based Adaptive Decision Feedback Equalizer (ADFE) structure using Distributed Arithmetic (DA) is presented. The filtering and weight-updating operations of the Feed Forward Filter (FFF) and Feedback Filter (FBF) of the ADFE have been recast using DA framework in order to obtain efficient multiplierless realization. Unlike, the DA based realization of the fixed coefficient filter, in case of adaptive filters, the updating of partial-products from time to time is a difficult task. We proposed an efficient technique which uses an auxiliary memory to perform the weight-update operation. This memory is updated from time to time using a register which stores the newest sample of the filter input. The proposed architecture is hardware efficient in the sense that it uses no multiplier units and fewer adders compared to existing architecture. For instance, for an ADFE with FBF length is equal to 8, with proper choice of parameters in the DA structure, the proposed architecture uses around 20% less chip area and power compared to most recent architecture existing in the literature. Simulation results show that the convergence characteristics of the proposed DA based LMS ADFE is almost similar to conventional multiply-accumulate (MAC) based realization.
ISSN:0165-1684
DOI:10.1016/j.sigpro.2021.108083