Data dependency reduction for high-performance FPGA implementation of DEFLATE compression algorithm

The rapid development of modern information technology has resulted in a sharp increase in the rate of data growth. This results in a lack of storage space and network bandwidth. Compression technology is typically implemented to mitigate the increasing demand for storage and the transmission cost o...

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Vydané v:Journal of systems architecture Ročník 98; s. 41 - 52
Hlavní autori: Kim, Youngil, Choi, Seungdo, Jeong, Joonyong, Song, Yong Ho
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: Elsevier B.V 01.09.2019
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ISSN:1383-7621, 1873-6165
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Abstract The rapid development of modern information technology has resulted in a sharp increase in the rate of data growth. This results in a lack of storage space and network bandwidth. Compression technology is typically implemented to mitigate the increasing demand for storage and the transmission cost of data. However, data compression may impose a significant computational burden on the CPU, which results in a degradation of system performance. To solve this problem, a hardware offloading technique can be used. Hardware offloading not only reduces the computational load imposed on the CPU but also improves the performance of the compression algorithm by exploiting hardware parallelism. However, data-hazards associated with the compression algorithm hinders achieving the achievement of a high degree of parallelism. DEFLATE is a widely used lossless compression scheme. Many studies have attempted to eliminate the data dependencies associated with compression algorithms. Unfortunately, existing studies do not address data dependency elimination in Huffman encoding. Our work aims to parallelize Huffman encoding by solving the data-hazard problem in the algorithm. To address the data dependency that exists in the Huffman encoding algorithm, a new data representation for the intermediate data generated during data compression is proposed. The effectiveness of the proposed scheme was evaluated via the implementation of an architecture which applied the approach in the field-programmable gate array (FPGA) platform. Experimental results show that the proposed scheme can increase the throughput of the compressor by up to 14.4%.
AbstractList The rapid development of modern information technology has resulted in a sharp increase in the rate of data growth. This results in a lack of storage space and network bandwidth. Compression technology is typically implemented to mitigate the increasing demand for storage and the transmission cost of data. However, data compression may impose a significant computational burden on the CPU, which results in a degradation of system performance. To solve this problem, a hardware offloading technique can be used. Hardware offloading not only reduces the computational load imposed on the CPU but also improves the performance of the compression algorithm by exploiting hardware parallelism. However, data-hazards associated with the compression algorithm hinders achieving the achievement of a high degree of parallelism. DEFLATE is a widely used lossless compression scheme. Many studies have attempted to eliminate the data dependencies associated with compression algorithms. Unfortunately, existing studies do not address data dependency elimination in Huffman encoding. Our work aims to parallelize Huffman encoding by solving the data-hazard problem in the algorithm. To address the data dependency that exists in the Huffman encoding algorithm, a new data representation for the intermediate data generated during data compression is proposed. The effectiveness of the proposed scheme was evaluated via the implementation of an architecture which applied the approach in the field-programmable gate array (FPGA) platform. Experimental results show that the proposed scheme can increase the throughput of the compressor by up to 14.4%.
Author Song, Yong Ho
Jeong, Joonyong
Choi, Seungdo
Kim, Youngil
Author_xml – sequence: 1
  givenname: Youngil
  surname: Kim
  fullname: Kim, Youngil
  email: yikim@enc.hanyang.ac.kr
– sequence: 2
  givenname: Seungdo
  orcidid: 0000-0002-6847-9498
  surname: Choi
  fullname: Choi, Seungdo
  email: sdchoi@enc.hanyang.ac.kr
– sequence: 3
  givenname: Joonyong
  surname: Jeong
  fullname: Jeong, Joonyong
  email: jyjeong@enc.hanyang.ac.kr
– sequence: 4
  givenname: Yong Ho
  orcidid: 0000-0002-1759-4242
  surname: Song
  fullname: Song, Yong Ho
  email: yhsong@hanyang.ac.kr
BookMark eNqFkE1OwzAQhS1UJErhBixygQQ7dlyHBVLVP5AqwaJ7y7EnraskjuyA1NvjElYsYDYzGr33NPPdoknnOkDogeCMYMIfT1k4B-V1lmNSZphnGBdXaErEnKac8GISZypoOuc5uUG3IZxwVBQknyK9UoNKDPTQGej0OfFgPvRgXZfUzidHezimPfg4t6rTkGzet4vEtn0DLXSD-ha6OlmtN7vFfp1o1_YeQrisVXNw3g7H9g5d16oJcP_TZ2i_We-XL-nubfu6XOxSTTEfUmpiFZUBUdYcaMVBC0OZYTynAIRAwVipmCJlzSqAqgIhQAlVMC7qeUln6GmM1d6F4KGW2o4XDl7ZRhIsL7TkSY605IWWxFxGFtHMfpl7b1vlz__ZnkcbxL8-LXgZtI0cwVgPepDG2b8DvgC2O4uC
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Cites_doi 10.1109/JRPROC.1952.273898
10.17487/rfc1950
10.1109/TIT.1977.1055714
10.1016/j.sysarc.2018.06.001
ContentType Journal Article
Copyright 2019 Elsevier B.V.
Copyright_xml – notice: 2019 Elsevier B.V.
DBID AAYXX
CITATION
DOI 10.1016/j.sysarc.2019.06.005
DatabaseName CrossRef
DatabaseTitle CrossRef
DatabaseTitleList
DeliveryMethod fulltext_linktorsrc
Discipline Computer Science
EISSN 1873-6165
EndPage 52
ExternalDocumentID 10_1016_j_sysarc_2019_06_005
S1383762118306453
GroupedDBID --K
--M
-~X
.DC
.~1
0R~
1B1
1~.
1~5
29L
4.4
457
4G.
5GY
5VS
7-5
71M
8P~
AACTN
AAEDT
AAEDW
AAIAV
AAIKJ
AAKOC
AALRI
AAOAW
AAQFI
AAQXK
AAXUO
AAYFN
ABBOA
ABFNM
ABFRF
ABJNI
ABMAC
ABXDB
ABYKQ
ACDAQ
ACGFO
ACGFS
ACNNM
ACRLP
ACZNC
ADBBV
ADEZE
ADJOM
ADMUD
ADTZH
AEBSH
AECPX
AEFWE
AEKER
AENEX
AFKWA
AFTJW
AGHFR
AGUBO
AGYEJ
AHJVU
AHZHX
AIALX
AIEXJ
AIKHN
AITUG
AJBFU
AJOXV
ALMA_UNASSIGNED_HOLDINGS
AMFUW
AMRAJ
AOUOD
ASPBG
AVWKF
AXJTR
AZFZN
BJAXD
BKOJK
BKOMP
BLXMC
CS3
DU5
EBS
EFJIC
EFLBG
EJD
EO8
EO9
EP2
EP3
FDB
FEDTE
FGOYB
FIRID
FNPLU
FYGXN
G-Q
GBLVA
GBOLZ
HVGLF
HZ~
IHE
J1W
JJJVA
KOM
M41
MO0
MS~
N9A
O-L
O9-
OAUVE
OZT
P-8
P-9
P2P
PC.
PQQKQ
Q38
R2-
RIG
ROL
RPZ
RXW
SBC
SDF
SDG
SDP
SES
SEW
SPC
SPCBC
SST
SSV
SSZ
T5K
TAE
TN5
U5U
UHS
~G-
9DU
AATTM
AAXKI
AAYWO
AAYXX
ABWVN
ACLOT
ACRPL
ACVFH
ADCNI
ADNMO
AEIPS
AEUPX
AFJKZ
AFPUW
AGQPQ
AIGII
AIIUN
AKBMS
AKRWK
AKYEP
ANKPU
APXCP
CITATION
EFKBS
~HD
ID FETCH-LOGICAL-c306t-3dddd5bde89f6e3b6ec8d34d4623ee11e5449a4a19f4beebbe88ea8a5468f793
ISICitedReferencesCount 13
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000487166300004&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
ISSN 1383-7621
IngestDate Sat Nov 29 06:57:14 EST 2025
Tue Nov 18 21:01:45 EST 2025
Fri Feb 23 02:28:02 EST 2024
IsPeerReviewed true
IsScholarly true
Keywords Accelerator architecture
Huffman coding
Data compression
Field programmable gate arrays
Pipeline processing
Language English
LinkModel OpenURL
MergedId FETCHMERGED-LOGICAL-c306t-3dddd5bde89f6e3b6ec8d34d4623ee11e5449a4a19f4beebbe88ea8a5468f793
ORCID 0000-0002-6847-9498
0000-0002-1759-4242
PageCount 12
ParticipantIDs crossref_citationtrail_10_1016_j_sysarc_2019_06_005
crossref_primary_10_1016_j_sysarc_2019_06_005
elsevier_sciencedirect_doi_10_1016_j_sysarc_2019_06_005
PublicationCentury 2000
PublicationDate September 2019
2019-09-00
PublicationDateYYYYMMDD 2019-09-01
PublicationDate_xml – month: 09
  year: 2019
  text: September 2019
PublicationDecade 2010
PublicationTitle Journal of systems architecture
PublicationYear 2019
Publisher Elsevier B.V
Publisher_xml – name: Elsevier B.V
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SSID ssj0005512
Score 2.2546387
Snippet The rapid development of modern information technology has resulted in a sharp increase in the rate of data growth. This results in a lack of storage space and...
SourceID crossref
elsevier
SourceType Enrichment Source
Index Database
Publisher
StartPage 41
SubjectTerms Accelerator architecture
Data compression
Field programmable gate arrays
Huffman coding
Pipeline processing
Title Data dependency reduction for high-performance FPGA implementation of DEFLATE compression algorithm
URI https://dx.doi.org/10.1016/j.sysarc.2019.06.005
Volume 98
WOSCitedRecordID wos000487166300004&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
journalDatabaseRights – providerCode: PRVESC
  databaseName: Elsevier SD Freedom Collection Journals 2021
  customDbUrl:
  eissn: 1873-6165
  dateEnd: 99991231
  omitProxy: false
  ssIdentifier: ssj0005512
  issn: 1383-7621
  databaseCode: AIEXJ
  dateStart: 19960101
  isFulltext: true
  titleUrlDefault: https://www.sciencedirect.com
  providerName: Elsevier
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwtV1Lb9swDBaydodd9h7WvaDDboGGepJs-Ri0ybqhKAo0h-xkSLK8tkjtIPWK9q_s14562d6yN7AcjECwYoH8QtLSRxKh10orQSXlRKhdRhjVmsiUZ6RS0mjwcFpVrmT-YXZ0JBaL_Hg0-hJzYa6WWV2L6-t89V9VDWOgbJs6-xfq7n4UBuA7KB2uoHa4_pHi92Urx7G3rb4Zr21x1o5RaMsTk9UgW2B2_G5icyUDjTwGkPvT2eFkPnWUc0-Vrcdy-alZn7WnFz-JaH1V6Mvx8HCiP-N3wHPGpWd17J02jk1wYmC4bDo6j-mIwk190wTnaveBwvhH2yHpoBluWSQ9Jyvso23k0jjTC-_KBEyzv8_4MZFReLn13SSivfZdq4PBZcnAdftauBtOwe9PnL8BKYAALJ0vdzVbd3nvBDtq4oldh10G2Dpby4_eQttvM56D0d-evJ8uPvQEIu7P0uO6Y2KmYw9uPuvHgc8gmJnfR3eDzvDEo-cBGpn6IboXO3zgYPAfIW3BhHsw4Q5MGACEvwcTtmDC34IJNxUOYMIDMOEOTI_RfDad7x2Q0JaDaJBIS2gJH65KI_IqNVSlRouSspJBJG1MkhjOWC6ZTPKKKWOUMkIYKSRnqajAHTxBW3VTm6cIQygqKiptUUcKDpvnZSWUkiLhpRZcpjuIRpEVOpSst51TlkXkJp4XXtCFFXThKJp8B5Fu1sqXbPnN_VnURhHCTh9OFgCgX8589s8zn6M7_R_jBdpq15_NS3RbX7Vnl-tXAWlfATbxrfk
linkProvider Elsevier
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Data+dependency+reduction+for+high-performance+FPGA+implementation+of+DEFLATE+compression+algorithm&rft.jtitle=Journal+of+systems+architecture&rft.au=Kim%2C+Youngil&rft.au=Choi%2C+Seungdo&rft.au=Jeong%2C+Joonyong&rft.au=Song%2C+Yong+Ho&rft.date=2019-09-01&rft.pub=Elsevier+B.V&rft.issn=1383-7621&rft.eissn=1873-6165&rft.volume=98&rft.spage=41&rft.epage=52&rft_id=info:doi/10.1016%2Fj.sysarc.2019.06.005&rft.externalDocID=S1383762118306453
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1383-7621&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1383-7621&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1383-7621&client=summon