APA (7th ed.) Citation

Dixon, M. F., Chong, J., & Keutzer, K. (2012). Accelerating Value-at-Risk estimation on highly parallel architectures. Concurrency and computation, 24(8), 895-907. https://doi.org/10.1002/cpe.1790

Chicago Style (17th ed.) Citation

Dixon, M. F., J. Chong, and K. Keutzer. "Accelerating Value-at-Risk Estimation on Highly Parallel Architectures." Concurrency and Computation 24, no. 8 (2012): 895-907. https://doi.org/10.1002/cpe.1790.

MLA (9th ed.) Citation

Dixon, M. F., et al. "Accelerating Value-at-Risk Estimation on Highly Parallel Architectures." Concurrency and Computation, vol. 24, no. 8, 2012, pp. 895-907, https://doi.org/10.1002/cpe.1790.