Elsayed, G., Soleit, E., & Kayed, S. (2023). FPGA design and implementation for adaptive digital chaotic key generator. Bulletin of the National Research Centre, 47(1), 122-9. https://doi.org/10.1186/s42269-023-01096-9
Citace podle Chicago (17th ed.)Elsayed, Ghada, Elsayed Soleit, a Somaya Kayed. "FPGA Design and Implementation for Adaptive Digital Chaotic Key Generator." Bulletin of the National Research Centre 47, no. 1 (2023): 122-9. https://doi.org/10.1186/s42269-023-01096-9.
Citace podle MLA (9th ed.)Elsayed, Ghada, et al. "FPGA Design and Implementation for Adaptive Digital Chaotic Key Generator." Bulletin of the National Research Centre, vol. 47, no. 1, 2023, pp. 122-9, https://doi.org/10.1186/s42269-023-01096-9.
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