PaRSEC: Exploiting Heterogeneity to Enhance Scalability

New high-performance computing system designs with steeply escalating processor and core counts, burgeoning heterogeneity and accelerators, and increasingly unpredictable memory access times call for one or more dramatically new programming paradigms. These new approaches must react and adapt quickl...

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Vydané v:	Computing in science & engineering Ročník 15; číslo 6; s. 36 - 45
Hlavní autori:	Bosilca, George, Bouteiller, Aurelien, Danalis, Anthony, Faverge, Mathieu, Herault, Thomas, Dongarra, Jack J.
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.11.2013 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Adaptation models Algorithms Biological system modeling Computation Computational modeling Computer architecture distributed programming Hardware Heterogeneity high-performance computing HPC Microprocessors Parallel processing Programming programming paradigms Runtime Scalability scheduling and task partitioning scientific computing Separation Tasks
ISSN:	1521-9615, 1558-366X
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