APA-Zitierstil (7. Ausg.)

DORNEICH, M. C., & SAHINIDIS, N. V. (1995). GLOBAL OPTIMIZATION ALGORITHMS FOR CHIP LAYOUT AND COMPACTION. Engineering optimization, 25(2), 131-154. https://doi.org/10.1080/03052159508941259

Chicago-Zitierstil (17. Ausg.)

DORNEICH, MICHAEL C., und NIKOLAOS V. SAHINIDIS. "GLOBAL OPTIMIZATION ALGORITHMS FOR CHIP LAYOUT AND COMPACTION." Engineering Optimization 25, no. 2 (1995): 131-154. https://doi.org/10.1080/03052159508941259.

MLA-Zitierstil (9. Ausg.)

DORNEICH, MICHAEL C., und NIKOLAOS V. SAHINIDIS. "GLOBAL OPTIMIZATION ALGORITHMS FOR CHIP LAYOUT AND COMPACTION." Engineering Optimization, vol. 25, no. 2, 1995, pp. 131-154, https://doi.org/10.1080/03052159508941259.