DORNEICH, M. C., & SAHINIDIS, N. V. (1995). GLOBAL OPTIMIZATION ALGORITHMS FOR CHIP LAYOUT AND COMPACTION. Engineering optimization, 25(2), 131-154. https://doi.org/10.1080/03052159508941259
Citace podle Chicago (17th ed.)DORNEICH, MICHAEL C., a NIKOLAOS V. SAHINIDIS. "GLOBAL OPTIMIZATION ALGORITHMS FOR CHIP LAYOUT AND COMPACTION." Engineering Optimization 25, no. 2 (1995): 131-154. https://doi.org/10.1080/03052159508941259.
Citace podle MLA (9th ed.)DORNEICH, MICHAEL C., a NIKOLAOS V. SAHINIDIS. "GLOBAL OPTIMIZATION ALGORITHMS FOR CHIP LAYOUT AND COMPACTION." Engineering Optimization, vol. 25, no. 2, 1995, pp. 131-154, https://doi.org/10.1080/03052159508941259.
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