Bank-Tavakoli, E., Ghasemzadeh, S. A., Kamal, M., Afzali-Kusha, A., & Pedram, M. (2020). POLAR: A Pipelined/Overlapped FPGA-Based LSTM Accelerator. IEEE transactions on very large scale integration (VLSI) systems, 28(3), 838-842. https://doi.org/10.1109/TVLSI.2019.2947639
Citace podle Chicago (17th ed.)Bank-Tavakoli, Erfan, Seyed Abolfazl Ghasemzadeh, Mehdi Kamal, Ali Afzali-Kusha, a Massoud Pedram. "POLAR: A Pipelined/Overlapped FPGA-Based LSTM Accelerator." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28, no. 3 (2020): 838-842. https://doi.org/10.1109/TVLSI.2019.2947639.
Citace podle MLA (9th ed.)Bank-Tavakoli, Erfan, et al. "POLAR: A Pipelined/Overlapped FPGA-Based LSTM Accelerator." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 3, 2020, pp. 838-842, https://doi.org/10.1109/TVLSI.2019.2947639.