Architecture Optimization and Performance Comparison of Nonce-Misuse-Resistant Authenticated Encryption Algorithms

This paper presents a performance comparison of new authenticated encryption (AE) algorithms which are aimed at providing better security and resource efficiency compared to existing standards. Specifically, these algorithms improve the security of existing AE standards by providing a critical prope...

Celý popis

Uloženo v:

Podrobná bibliografie
Vydáno v:	IEEE transactions on very large scale integration (VLSI) systems Ročník 27; číslo 5; s. 1053 - 1066
Hlavní autoři:	Koteshwara, Sandhya, Das, Amitabh, Parhi, Keshab K.
Médium:	Journal Article
Jazyk:	angličtina
Vydáno:	New York IEEE 01.05.2019 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:	Advanced Encryption Standard in Galois Counter mode (AES-GCM) AES-GCM-synthetic IV (SIV) Algorithms Applicability Application specific integrated circuits Architecture authenticated encryption (AE) Authentication Co-design Competition for AE: Security Deoxys Encryption Field programmable gate arrays Gate arrays Integrated circuits nonce-misuse resistance Optimization pipelineable on-line encryption with authentication tag (POET) PRIMATE-APE Resistance Robustness (CAESAR) competition Security
ISSN:	1063-8210, 1557-9999
On-line přístup:	Získat plný text
Tagy:	Přidat tag Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!

Buďte první, kdo okomentuje tento záznam!