Digit-Level Serial-In Parallel-Out Multiplier Using Redundant Representation for a Class of Finite Fields
Two digit-level finite field multipliers in F 2 m using redundant representation are presented. Embedding F 2 m in cyclotomic field F 2 (n) causes a certain amount of redundancy and consequently performing field multiplication using redundant representation would require more hardware resources. Bas...
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| Vydané v: | IEEE transactions on very large scale integration (VLSI) systems Ročník 25; číslo 5; s. 1632 - 1643 |
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| Hlavní autori: | , , |
| Médium: | Journal Article |
| Jazyk: | English |
| Vydavateľské údaje: |
New York
IEEE
01.05.2017
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Predmet: | |
| ISSN: | 1063-8210, 1557-9999 |
| On-line prístup: | Získať plný text |
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| Shrnutí: | Two digit-level finite field multipliers in F 2 m using redundant representation are presented. Embedding F 2 m in cyclotomic field F 2 (n) causes a certain amount of redundancy and consequently performing field multiplication using redundant representation would require more hardware resources. Based on a specific feature of redundant representation in a class of finite fields, two new multiplication algorithms along with their pertaining architectures are proposed to alleviate this problem. Considering area-delay product as a measure of evaluation, it has been shown that both the proposed architectures considerably outperform existing digit-level multipliers using the same basis. It is also shown that for a subset of the fields, the proposed multipliers are of higher performance in terms of area-delay complexities among several recently proposed optimal normal basis multipliers. The main characteristics of the postplace&route application specific integrated circuit implementation of the proposed multipliers for three practical digit sizes are also reported. |
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| Bibliografia: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
| ISSN: | 1063-8210 1557-9999 |
| DOI: | 10.1109/TVLSI.2016.2646479 |