Precise Subclock Period Delay in Digital Radar Target Simulation

In the digital radar target simulation, the period of the digital signal processing clock determines the tiniest step in signal delay. The signal delay determines the range of the simulated target. Therefore, the step in signal delay corresponds to the range resolution of the target simulator. This...

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Veröffentlicht in:	IEEE transactions on instrumentation and measurement Jg. 74; S. 1 - 11
Hauptverfasser:	Sobotka, Jan, Adler, Viktor
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 2025 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Automotive engineering Automotive radar Clocks Delay lines Delays Digital signal processing enhanced signal resolution Field programmable gate arrays field-programmable gate array (FPGA) implementation picosecond precision Radar Radar antennas Radar arrays Radar cross-sections radar signal processing Radar targets Sensors Signal delay Signal processing Signal resolution Simulation subclock signal delay target simulator Target simulators
ISSN:	0018-9456, 1557-9662
Online-Zugang:	Volltext
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