Exploring Fine-Grained In-Memory Database Performance for Modern CPUs

Modern CPUs keep integrating more cores and large size cache, which is beneficial for in-memory databases to improve parallel processing power and cache locality. While state-of-the-art CPUs have diverse architectures and roadmaps such as large core count and large cache size (AMD x86), moderate cor...

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Vydané v:	IEEE transactions on parallel and distributed systems Ročník 34; číslo 6; s. 1 - 16
Hlavní autori:	Liu, Zhuan, Han, Ruichen, Zhang, Yansong, Zhang, Yu, Tang, Xi, Deng, Gang, Zhong, Tao, Dementiev, Roman, Lu, Yunfei, Que, Mingjian
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.06.2023 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Algorithms Benchmark testing Benchmarks cache architecture Central processing units Computer architecture Computer memory CPUs Hardware In-memory database Micromechanical devices Microprocessors multi-core OLAP benchmark Operator performance Parallel processing Performance evaluation Performance prediction Program processors Sockets
ISSN:	1045-9219, 1558-2183
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