NEST: A Quadruple-Node Upset Recovery Latch Design and Algorithm-Based Recovery Optimization

Multinode upset induced by radiation on integrated circuits has caused many circuit reliability issues. This article proposes a single-event quadruple-node upset (QNU) recovery latch (NEST), based on four circular feedback loops that are formed by 25 C-elements to realize high robustness. NEST achie...

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Vydané v:	IEEE transactions on aerospace and electronic systems Ročník 60; číslo 4; s. 4590 - 4600
Hlavní autori:	Huang, Zhengfeng, Sun, Liting, Wang, Xu, Liang, Huaguo, Lu, Yingchun, Yan, Aibin, Pan, Jun, Wen, Xiaoqing
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.08.2024 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Aerospace and electronic systems Algorithms Circuit reliability Design optimization Feedback loops High impedance Integrated circuits Inverters Latches Logic gates Nodes Optimization Optimization algorithm Power demand quadruple-node upset (QNU) recovery Radiation hardening (electronics) radiation hardening by design Recovery recovery rate
ISSN:	0018-9251, 1557-9603
On-line prístup:	Získať plný text
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