DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory

Processing-in-memory (PIM), as a novel computing paradigm, provides significant performance benefits from the aspect of effective data movement reduction. SRAM-based PIM has been demonstrated as one of the most promising candidates due to its endurance and compatibility. However, the integration den...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems Jg. 43; H. 3; S. 906 - 918
Hauptverfasser:	Duan, Cenlin, Yang, Jianlei, He, Xiaolin, Qi, Yingjie, Wang, Yikun, Wang, Yiou, He, Ziyan, Yan, Bonan, Wang, Xueyan, Jia, Xiaotao, Pan, Weitao, Zhao, Weisheng
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 01.03.2024 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Algorithm/architecture co-design Algorithms Artificial neural networks Co-design Computational modeling Computer architecture Density doubling data capacity In-memory computing Memory architecture Neural networks Parallel processing processing-in-memory (PIM) SRAM cells SRAM-PIM Static random access memory
ISSN:	0278-0070, 1937-4151
Online-Zugang:	Volltext
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