Synthesizing Formal Network Specifications From Input-Output Examples
We propose, a tool that synthesizes network specifications in a declarative logic programming language from input-output examples. aims to accelerate the adoption of formal verification in networking practice, by reducing the effort and expertise required to specify network models or properties. aim...
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| Vydáno v: | IEEE/ACM transactions on networking Ročník 31; číslo 3; s. 1 - 16 |
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| Médium: | Journal Article |
| Jazyk: | angličtina |
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IEEE
01.06.2023
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| ISSN: | 1063-6692, 1558-2566 |
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| Abstract | We propose, a tool that synthesizes network specifications in a declarative logic programming language from input-output examples. aims to accelerate the adoption of formal verification in networking practice, by reducing the effort and expertise required to specify network models or properties. aims to be i) highly expressive, capable of synthesizing network specifications with complex semantics; ii) scalable, by virtue of using a novel best-first search algorithm to efficiently explore an unbounded solution space, and iii) robust, avoiding the need for exhaustive input-output examples by actively generating new examples. Our experiments demonstrate that can synthesize a wide range of specifications used in network verification, analysis, and implementations. Furthermore, improves upon existing approaches in terms of expressiveness, robustness to examples, and the quality of synthesized programs. |
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| AbstractList | We propose, a tool that synthesizes network specifications in a declarative logic programming language from input-output examples. aims to accelerate the adoption of formal verification in networking practice, by reducing the effort and expertise required to specify network models or properties. aims to be i) highly expressive, capable of synthesizing network specifications with complex semantics; ii) scalable, by virtue of using a novel best-first search algorithm to efficiently explore an unbounded solution space, and iii) robust, avoiding the need for exhaustive input-output examples by actively generating new examples. Our experiments demonstrate that can synthesize a wide range of specifications used in network verification, analysis, and implementations. Furthermore, improves upon existing approaches in terms of expressiveness, robustness to examples, and the quality of synthesized programs. We propose NetSpec, a tool that synthesizes network specifications in a declarative logic programming language from input-output examples. NetSpec aims to accelerate the adoption of formal verification in networking practice, by reducing the effort and expertise required to specify network models or properties. NetSpec aims to be i) highly expressive, capable of synthesizing network specifications with complex semantics; ii) scalable, by virtue of using a novel best-first search algorithm to efficiently explore an unbounded solution space, and iii) robust, avoiding the need for exhaustive input-output examples by actively generating new examples. Our experiments demonstrate that NetSpec can synthesize a wide range of specifications used in network verification, analysis, and implementations. Furthermore, NetSpec improves upon existing approaches in terms of expressiveness, robustness to examples, and the quality of synthesized programs. |
| Author | Chen, Haoxian Wu, Chenyuan Naik, Mayur Raghothaman, Mukund Loo, Boon Thau Zhao, Andrew |
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| Snippet | We propose, a tool that synthesizes network specifications in a declarative logic programming language from input-output examples. aims to accelerate the... We propose NetSpec, a tool that synthesizes network specifications in a declarative logic programming language from input-output examples. NetSpec aims to... |
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| SubjectTerms | Benchmark testing Consensus protocol Logic programming Network protocol program synthesis Programming languages Robustness (mathematics) Routing protocols Runtime Search algorithms Security Semantics Solution space Specifications Synthesis Task analysis Verification |
| Title | Synthesizing Formal Network Specifications From Input-Output Examples |
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