APA (7th ed.) Citation

Su, Y., Kim, H., & Kim, B. (2022). CIM-Spin: A Scalable CMOS Annealing Processor With Digital In-Memory Spin Operators and Register Spins for Combinatorial Optimization Problems. IEEE journal of solid-state circuits, 57(7), 2263-2273. https://doi.org/10.1109/JSSC.2021.3139901

Chicago Style (17th ed.) Citation

Su, Yuqi, Hyunjoon Kim, and Bongjin Kim. "CIM-Spin: A Scalable CMOS Annealing Processor With Digital In-Memory Spin Operators and Register Spins for Combinatorial Optimization Problems." IEEE Journal of Solid-state Circuits 57, no. 7 (2022): 2263-2273. https://doi.org/10.1109/JSSC.2021.3139901.

MLA (9th ed.) Citation

Su, Yuqi, et al. "CIM-Spin: A Scalable CMOS Annealing Processor With Digital In-Memory Spin Operators and Register Spins for Combinatorial Optimization Problems." IEEE Journal of Solid-state Circuits, vol. 57, no. 7, 2022, pp. 2263-2273, https://doi.org/10.1109/JSSC.2021.3139901.