Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes for Constructing 3-D VLSI Subarrays

In this paper, we investigated the technique for improving the reliability of 3-D processor with faults by reconfiguring a 3-D fault-free subarray utilizing as many nonfaulty process elements (PEs) as possible. A novel flexible rerouting scheme is proposed, which makes the PEs can be rerouted or byp...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems Jg. 39; H. 1; S. 267 - 271
Hauptverfasser:	Qian, Junyan, Ding, Hao, Xiao, Hanpeng, Zhou, Zhide, Zhao, Lingzhong, Zhai, Zhongyi
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 01.01.2020 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	3-D processor array Algorithms Arrays Circuit faults Fault tolerance Fault tolerant systems Ground penetrating radar Heuristic methods Integrated circuits Logic arrays Microprocessors Reconfiguration rerouting algorithm Switches Three-dimensional displays
ISSN:	0278-0070, 1937-4151
Online-Zugang:	Volltext
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