Ramamoorthy, C. V., & Wah, B. W. (1981). An Optimal Algorithm for Scheduling Requests on Interleaved Memories for a Pipelined Processor. IEEE transactions on computers, C-30(10), 787-800. https://doi.org/10.1109/TC.1981.1675697
Citace podle Chicago (17th ed.)Ramamoorthy, C V., a B W. Wah. "An Optimal Algorithm for Scheduling Requests on Interleaved Memories for a Pipelined Processor." IEEE Transactions on Computers C-30, no. 10 (1981): 787-800. https://doi.org/10.1109/TC.1981.1675697.
Citace podle MLA (9th ed.)Ramamoorthy, C V., a B W. Wah. "An Optimal Algorithm for Scheduling Requests on Interleaved Memories for a Pipelined Processor." IEEE Transactions on Computers, vol. C-30, no. 10, 1981, pp. 787-800, https://doi.org/10.1109/TC.1981.1675697.
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