Design and development of FPGA based simplified DNBR calculation algorithm for APR 1400 NPPs

•The simplified algorithm was developed by MATLAB and then converted to VHSIC Hardware Description Language (VHDL) code by using MATLAB HDL coder.•The complexity was measured using Hardware Description Language (HDL) resources that are required to implement the current and simplified algorithms.•Thi...

Celý popis

Uloženo v:
Podrobná bibliografie
Vydáno v:Nuclear engineering and design Ročník 352; s. 110134
Hlavní autoři: Awad, Ibrahim Fathy, Jung, Jaechon
Médium: Journal Article
Jazyk:angličtina
Vydáno: Amsterdam Elsevier B.V 01.10.2019
Elsevier BV
Témata:
ISSN:0029-5493, 1872-759X
On-line přístup:Získat plný text
Tagy: Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
Popis
Shrnutí:•The simplified algorithm was developed by MATLAB and then converted to VHSIC Hardware Description Language (VHDL) code by using MATLAB HDL coder.•The complexity was measured using Hardware Description Language (HDL) resources that are required to implement the current and simplified algorithms.•This new approach can successfully reduce the HDL resources by 29.51% as average value for all HDL resources. Nuclear Power Plant Instrumentation and Control Systems are beginning to move towards Field Programmable Gate Array (FPGA) applications. This paper presents a new, simplified Departure from Nucleate Boiling Ratio (DNBR) calculation algorithm for Advanced Power Reactor (APR 1400). This new approach was implemented using FPGA based system to replace the current Core Protection Calculator System (CPCS) which uses Programmable Logic Controller (PLC). Three channels modeling were used to predict the mass flux and enthalpy distributions in hot channel, rather than four channel modeling. The simplified algorithm was developed by MATLAB and then converted to VHSIC Hardware Description Language (VHDL) code by using MATLAB HDL coder. Minimum DNBR values were calculated at 100%, 75%, and 50% reactor power levels. The accuracy of DNBR calculation for this new approach was evaluated and verified by comparing the results with KEPCO E&C APR 1400 CPCS test facility. The complexity was measured using Hardware Description Language (HDL) resources that are required to implement the current and simplified algorithms. This new approach can successfully reduce the HDL resources by 29.51% as average value for all HDL resources.
Bibliografie:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ISSN:0029-5493
1872-759X
DOI:10.1016/j.nucengdes.2019.05.030