Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems

Designing error correction code (ECC) to guarantee strong reliability for high bandwidth memory (HBM) is imperative in high performance computers, especially for systems equipped with graphics processing units (GPUs). The design of ECC is challenging because future GPUs are expected to implement a m...

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Vydáno v:	IEEE transactions on computers Ročník 68; číslo 5; s. 646 - 659
Hlavní autoři:	Chen, Hsing-Min, Lee, Shin-Ying, Mudge, Trevor, Wu, Carole-Jean, Chakrabarti, Chaitali
Médium:	Journal Article
Jazyk:	angličtina
Vydáno:	New York IEEE 01.05.2019 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:	3D DRAM Bandwidth Computer memory Design Energy consumption error control coding and GPU Error correction Error correction codes Fault detection Graphics processing units memory reliability Random access memory Reliability Three-dimensional displays Two dimensional displays
ISSN:	0018-9340, 1557-9956
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Abstract	Designing error correction code (ECC) to guarantee strong reliability for high bandwidth memory (HBM) is imperative in high performance computers, especially for systems equipped with graphics processing units (GPUs). The design of ECC is challenging because future GPUs are expected to implement a memory subsystem supporting fine and coarse-grained data accesses to match the difference in the spatial locality of GPGPU applications. Current ECC designs, however, are developed for a fixed data fetch granularity. To have a more flexible design, we propose a novel memory protection scheme, called Config(urable)-ECC, which provides strong reliability for both fine and coarse-grained data accesses. Config-ECC consists of two tiers of ECC protection. The tier-1 code is a strong product code that can correct errors due to small granularity faults and detect errors caused by large granularity faults. The tier-2 code is an XOR-based code that is employed to correct errors incurred by large granularity faults. Config-ECC provides stronger reliability and/or lower energy consumption compared to state-of-the-art fixed 32B and 64B ECC schemes. It reduces the HBM energy by 17-21 percent while reducing the failure in time (FIT) rate by 20 times compared to a state-of-the-art fixed 64B ECC scheme with an insignificant 1.2 percent performance overhead.
AbstractList	Designing error correction code (ECC) to guarantee strong reliability for high bandwidth memory (HBM) is imperative in high performance computers, especially for systems equipped with graphics processing units (GPUs). The design of ECC is challenging because future GPUs are expected to implement a memory subsystem supporting fine and coarse-grained data accesses to match the difference in the spatial locality of GPGPU applications. Current ECC designs, however, are developed for a fixed data fetch granularity. To have a more flexible design, we propose a novel memory protection scheme, called Config(urable)-ECC, which provides strong reliability for both fine and coarse-grained data accesses. Config-ECC consists of two tiers of ECC protection. The tier-1 code is a strong product code that can correct errors due to small granularity faults and detect errors caused by large granularity faults. The tier-2 code is an XOR-based code that is employed to correct errors incurred by large granularity faults. Config-ECC provides stronger reliability and/or lower energy consumption compared to state-of-the-art fixed 32B and 64B ECC schemes. It reduces the HBM energy by 17-21 percent while reducing the failure in time (FIT) rate by 20 times compared to a state-of-the-art fixed 64B ECC scheme with an insignificant 1.2 percent performance overhead.
Author	Lee, Shin-Ying Chakrabarti, Chaitali Mudge, Trevor Wu, Carole-Jean Chen, Hsing-Min
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SubjectTerms	3D DRAM Bandwidth Computer memory Design Energy consumption error control coding and GPU Error correction Error correction codes Fault detection Graphics processing units memory reliability Random access memory Reliability Three-dimensional displays Two dimensional displays
Title	Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems
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