DSP design protection in CE through algorithmic transformation based structural obfuscation

Structural obfuscation offers a means to effectively secure through obfuscation the contents of an intellectual property (IP) cores used in an electronic system-on-chip (SoC). In this work a novel structural obfuscation methodology for protecting a digital signal processor (DSP) IP core at the archi...

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Vydané v:IEEE transactions on consumer electronics Ročník 63; číslo 4; s. 467 - 476
Hlavní autori: Sengupta, Anirban, Roy, Dipanjan, Mohanty, Saraju P., Corcoran, Peter
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: New York IEEE 01.11.2017
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:
Algorithm design and analysis
Algorithms
Delays
Design optimization
Digital signal processing
Digital signal processing (DSP) core
Digital signal processors
Hardware
high-level transformation
Intellectual property
IP networks
IP protection
Microprocessors
Particle swarm optimization
Reverse engineering
Signal processing algorithms
Space exploration
structural obfuscation
System on chip
Transformations
ISSN:0098-3063, 1558-4127
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Popis
Shrnutí:Structural obfuscation offers a means to effectively secure through obfuscation the contents of an intellectual property (IP) cores used in an electronic system-on-chip (SoC). In this work a novel structural obfuscation methodology for protecting a digital signal processor (DSP) IP core at the architectural synthesis design stage. The proposed approach specifically targets protection of IP cores that involve complex loops. Five different algorithmic level transformation techniques are employed: loop unrolling, loop invariant code motion, tree height reduction/increment, logic transformation and redundant operation removal. Each of these can yield camouflaged functionally equivalent designs. In addition, low cost obfuscated design is generated through proposed approach through the use of multi-stage algorithmic transformation and particle swarm optimization (PSO)-drive design space exploration (DSE). Results of proposed approach yielded an enhancement obfuscation of 22 % and reduction in obfuscated design cost of 55 % compared to similar prior art.
Bibliografia:ObjectType-Article-1
SourceType-Scholarly Journals-1
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content type line 14
ISSN:0098-3063
1558-4127
DOI:10.1109/TCE.2017.015072