Efficient post-configuration testing of an asynchronous nanowire crossbar system for reliability

The recently proposed asynchronous nanowire crossbar architecture is envisioned to enhance the manufacturability and robustness of nanowire crossbar-based configurable digital circuits by removing various timing-related failure modes. In order to address this issue, a novel functional testing scheme...

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Veröffentlicht in:	IET computers & digital techniques Jg. 6; H. 4; S. 214 - 222
Hauptverfasser:	Lee, J.-S., Venkateswaran, S., Choi, M.
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	Stevenage Institution of Engineering and Technology 01.07.2012 John Wiley & Sons, Inc
Schlagworte:	Algorithms Applied sciences Circuit properties Computer simulation Cross-disciplinary physics: materials science; rheology Design. Technologies. Operation analysis. Testing Digital circuits Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Functional testing Integrated circuits Manufacturability Materials science Nanoscale materials and structures: fabrication and characterization Nanowires Physics Quantum wires Reconfiguration Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Threshold gates Performance evaluation Interconnection network Logic gate System reliability Clock Algorithm Failures Logic circuit Nanometer scale Digital circuit Feasibility Robustness Reconfigurable architectures Nanowires Threshold logic Deterministic approach Asynchronous circuit Figure of merit
ISSN:	1751-8601, 1751-861X
Online-Zugang:	Volltext
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