Synthesis of Parallel Software from Heterogeneous Dataflow Models

Dataflow process networks (DPNs) are intrinsically data-driven, i.e., node actions are not synchronized among each other and may fire whenever sufficient input operands arrived at a node. While the general model of computation (MoC) of DPNs does not impose further restrictions, many different subcla...

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Published in:	SN computer science Vol. 3; no. 3; p. 249
Main Authors:	Rafique, Omair, Schneider, Klaus
Format:	Journal Article
Language:	English
Published:	Singapore Springer Nature Singapore 01.05.2022 Springer Nature B.V
Subjects:	Behavior Computer Imaging Computer Science Computer Systems Organization and Communication Networks Data Structures and Information Theory Design Embedded systems Heterogeneity Information Systems and Communication Service Methods Model-Driven Engineering and Software Development Original Research Pattern Recognition and Graphics Semantics Software Software Engineering/Programming and Operating Systems Synthesis Vision Heterogeneity Automatic synthesis Dataflow process networks
ISSN:	2662-995X, 2661-8907
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Abstract	Dataflow process networks (DPNs) are intrinsically data-driven, i.e., node actions are not synchronized among each other and may fire whenever sufficient input operands arrived at a node. While the general model of computation (MoC) of DPNs does not impose further restrictions, many different subclasses of DPNs representing different dataflow MoCs have been considered over time. These classes mainly differ in the kinds of behaviors of the processes. A DPN may be heterogeneous in that different processes in the network belong to different classes of DPNs. A heterogeneous DPN can therefore be effectively used to model and to implement different components of a system with different kinds of processes and, therefore, different dataflow MoCs. This paper presents a model-based design based on different dataflow MoCs including their heterogeneous combinations. In particular, it covers the automatic software synthesis of systems from DPN models. The main objective is to validate, evaluate and compare the artifacts exhibited by different dataflow MoCs at the implementation level of systems under the supervision of a common design tool. Moreover, this work also offers an efficient synthesis method that targets and exploits heterogeneity in DPNs by generating implementations based on the kinds of behaviors of the processes. The proposed synthesis method provides a tool chain including different specialized code generators for specific dataflow MoCs, and a runtime system that finally maps models using a combination of different dataflow MoCs on cross-vendor target hardware.
AbstractList	Dataflow process networks (DPNs) are intrinsically data-driven, i.e., node actions are not synchronized among each other and may fire whenever sufficient input operands arrived at a node. While the general model of computation (MoC) of DPNs does not impose further restrictions, many different subclasses of DPNs representing different dataflow MoCs have been considered over time. These classes mainly differ in the kinds of behaviors of the processes. A DPN may be heterogeneous in that different processes in the network belong to different classes of DPNs. A heterogeneous DPN can therefore be effectively used to model and to implement different components of a system with different kinds of processes and, therefore, different dataflow MoCs. This paper presents a model-based design based on different dataflow MoCs including their heterogeneous combinations. In particular, it covers the automatic software synthesis of systems from DPN models. The main objective is to validate, evaluate and compare the artifacts exhibited by different dataflow MoCs at the implementation level of systems under the supervision of a common design tool. Moreover, this work also offers an efficient synthesis method that targets and exploits heterogeneity in DPNs by generating implementations based on the kinds of behaviors of the processes. The proposed synthesis method provides a tool chain including different specialized code generators for specific dataflow MoCs, and a runtime system that finally maps models using a combination of different dataflow MoCs on cross-vendor target hardware.
ArticleNumber	249
Author	Schneider, Klaus Rafique, Omair
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PhD. – reference: DidierKPotop-ButucaruDIoossGCohenASouyrisJBaufretonPGraillatACorrect-by-construction parallelization of hard real-time avionics applications on off-the-shelf predictable hardwareACM Trans Archit Code Optim201916324:124:2710.1145/3328799 – reference: BenvenisteACaillaudBLe GuernicPBaetenJCMMauwSFrom synchrony to asynchronyConcurrency theory (CONCUR)1999EindhovenSpringer16217710.1007/3-540-48320-9_13 – reference: Bai Y, Schneider K, Bhardwaj N, Katti B and Shazadi T. From clock-driven to data-driven models. In: Formal methods and models for codesign. Lausanne, Switzerland, 2014. IEEE Computer Society, pp. 32–41. – reference: TarjanRDepth first search and linear graph algorithmsSIAM J Comput (SICOMP)19721214616030417810.1137/0201010 – reference: Girault A. A survey of automatic distribution method for synchronous programs. In: Synchronous languages, applications, and programming (SLAP). Edinburgh, Scotland, UK, 2005, pp. 1–20. (unpublished workshop proceedings) – reference: Rafique O and Schneider K. A model-based synthesis framework for the execution of dynamic dataflow actors. In: International conference on internet of things embedded systems and communications. Hammamet, Tunisia, 2018. IEEE Computer Society. – reference: BenvenisteACaspiPEdwardsSHalbwachsNLe GuernicPde SimoneRThe synchronous languages twelve years laterProc IEEE2003911648310.1109/JPROC.2002.805826 – reference: GeilenMBastenTDeganoPRequirements on the execution of Kahn process networksEuropean symposium on programming (ESOP)2003WarsawSpringer3193341032.68025 – reference: BrooksCXLeeEATripakisSGivargisTDonlinAExploring models of computation with Ptolemy IIInternational conference on hardware/software codesign and system synthesis (CODES+ISSS)2010ScottsdaleACM331332 – reference: BhattacharyyaSSEkerJJanneckJWLucarzCMattavelliMRauletMOverview of the MPEG reconfigurable video coding frameworkJ Signal Process Syst201163225126310.1007/s11265-009-0399-3 – reference: Eker J and Janneck JW. CAL language report. ERL Technical Memo UCB/ERL M03/48, EECS Department, University of California at Berkeley, Berkeley, California, USA, 2003. – reference: Parks TM. Bounded scheduling of process networks. PhD thesis, Princeton University, 1995. PhD. – reference: Rafique O and Schneider K. SHeD: a framework for automatic software synthesis of heterogeneous dataflow process networks. In: Euromicro conference on digital system design (DSD), Portoroz̆, Slovenia, 2020. IEEE Computer Society. – reference: BerryGGonthierGThe Esterel synchronous programming language: design, semantics, implementationSci Comput Program19921928715210.1016/0167-6423(92)90005-V – reference: Rafique O, Bai Y, Schneider K and Yan G. Efficient implementation of heterogeneous dataflow models using synchronous IO patterns. In: Euromicro conference on digital system design (DSD). Palermo, Sicily, Italy, 2021; pp. 82–9. IEEE Computer Society. – reference: Rafique O and Schneider K. Employing OpenCL as a standard hardware abstraction in a distributed embedded system: a case study. In: Conference on cyber-physical systems and internet-of-things. Budva, Montenegro, 2020; pp. 1–7. IEEE Computer Society. – reference: HaubeltCFalkJKeinertJSchlichterTStreubührMDeyhleAHadertATeichJA SystemC-based design methodology for digital signal processing systemsEURASIP J Embed Syst200720071151510.1186/1687-3963-2007-047580 – reference: KarpRMMillerREProperties of a model for parallel computations: determinacy, termination, queueingSIAM J Appl Math (SIAP)19661461390141123044610.1137/0114108 – reference: RafiqueOGesellMSchneiderKCorporaalHStuijkSGenerating hardware specific code at different abstraction levels using AverestInternational workshop on software and compilers for embedded systems (SCOPES)2013Sankt GoarACM909210.1145/2463596.2486154 – reference: Kuhn T, Forster T, Braun T and Gotzhein R. FERAL—framework for simulator coupling on requirements and architecture level. In: Formal methods and models for codesign. Portland, OR, USA, 2013; pp. 11–22. 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Snippet	Dataflow process networks (DPNs) are intrinsically data-driven, i.e., node actions are not synchronized among each other and may fire whenever sufficient input...
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SubjectTerms	Behavior Computer Imaging Computer Science Computer Systems Organization and Communication Networks Data Structures and Information Theory Design Embedded systems Heterogeneity Information Systems and Communication Service Methods Model-Driven Engineering and Software Development Original Research Pattern Recognition and Graphics Semantics Software Software Engineering/Programming and Operating Systems Synthesis Vision
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Title	Synthesis of Parallel Software from Heterogeneous Dataflow Models
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