Addendum to “A fully parallel algorithm for residue to binary conversion”

Previously, 2 VLSI designs of a residue-to-binary converter were presented and evaluated according to the VLSI model of computation. Subsequently, a VLSI AT lower bound for the residue-to-binary conversion was derived. It has been proved that not only do the proposed structures compare favorably wit...

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Veröffentlicht in:Information processing letters Jg. 55; H. 1; S. 25 - 26
Hauptverfasser: Barsi, Ferrucio, Perotti, M.Cristina
Format: Journal Article
Sprache:Englisch
Veröffentlicht: Amsterdam Elsevier B.V 07.07.1995
Elsevier Science
Elsevier Sequoia S.A
Schlagworte:
Algorithmics. Computability. Computer arithmetics
Algorithms
Applied sciences
Computer science
Computer science; control theory; systems
Exact sciences and technology
Parallel algorithms
Parallel processing
Studies
Theoretical computing
Parallel algorithms
Integer
Lower bound
Parallel algorithm
VLSI circuit
Data conversion
Binary system
ISSN:0020-0190, 1872-6119
Online-Zugang:Volltext
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Beschreibung
Zusammenfassung:Previously, 2 VLSI designs of a residue-to-binary converter were presented and evaluated according to the VLSI model of computation. Subsequently, a VLSI AT lower bound for the residue-to-binary conversion was derived. It has been proved that not only do the proposed structures compare favorably with the previous results presented in the literature, but they also achieve the optimal AT figure for some choices of the residue system parameters.
Bibliographie:ObjectType-Article-1
SourceType-Scholarly Journals-1
content type line 14
ISSN:0020-0190
1872-6119
DOI:10.1016/0020-0190(95)00034-A