On implementing SWMR registers from SWSR registers in systems with Byzantine failures

The implementation of registers from (potentially) weaker registers is a classical problem in the theory of distributed computing. Since Lamport’s pioneering work (Lamport in Distrib Comput 1(2):77–101, 1986), this problem has been extensively studied in the context of asynchronous processes with cr...

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Veröffentlicht in:Distributed computing Jg. 37; H. 2; S. 145 - 175
Hauptverfasser: Hu, Xing, Toueg, Sam
Format: Journal Article
Sprache:Englisch
Veröffentlicht: Berlin/Heidelberg Springer Berlin Heidelberg 01.06.2024
Springer Nature B.V
Schlagworte:
Computer Communication Networks
Computer Hardware
Computer Science
Computer Systems Organization and Communication Networks
Context
Distributed processing
Failure
Registers
Signatures
Software Engineering/Programming and Operating Systems
Theory of Computation
Theory of computation
Shared registers
Concurrency
Distributed computing models
Linearizability
Distributed computing
Distributed algorithms
ISSN:0178-2770, 1432-0452
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Zusammenfassung:The implementation of registers from (potentially) weaker registers is a classical problem in the theory of distributed computing. Since Lamport’s pioneering work (Lamport in Distrib Comput 1(2):77–101, 1986), this problem has been extensively studied in the context of asynchronous processes with crash failures. In this paper, we investigate this problem in the context of Byzantine process failures, with and without process signatures. We first prove that, without signatures, there is no wait-free linearizable implementation of a 1-writer n -reader register from atomic 1-writer 1-reader registers. In fact, we show a stronger result, namely, even under the assumption that the writer can only crash and at most one reader can be malicious, there is no linearizable implementation of a 1-writer n -reader register from atomic 1-writer ( n - 1 ) -reader registers that ensures that every correct process eventually completes its operations. In light of this impossibility result, we give two implementations of a 1-writer n -reader register from atomic 1-writer 1-reader registers that work under different assumptions. The first implementation is linearizable (under any combination of Byzantine process failures), but it guarantees that every correct process eventually completes its operations only under the assumption that the writer is correct or no reader is Byzantine—thus matching the impossibility result. The second implementation assumes process signatures; it is wait-free and linearizable under any number and combination of Byzantine process failures.
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ISSN:0178-2770
1432-0452
DOI:10.1007/s00446-024-00465-5