APA-Zitierstil (7. Ausg.)

Torun, H. M., Swaminathan, M., Kavungal Davis, A., & Bellaredj, M. L. F. (2018). A Global Bayesian Optimization Algorithm and Its Application to Integrated System Design. IEEE transactions on very large scale integration (VLSI) systems, 26(4), 792-802. https://doi.org/10.1109/TVLSI.2017.2784783

Chicago-Zitierstil (17. Ausg.)

Torun, Hakki Mert, Madhavan Swaminathan, Anto Kavungal Davis, und Mohamed Lamine Faycal Bellaredj. "A Global Bayesian Optimization Algorithm and Its Application to Integrated System Design." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26, no. 4 (2018): 792-802. https://doi.org/10.1109/TVLSI.2017.2784783.

MLA-Zitierstil (9. Ausg.)

Torun, Hakki Mert, et al. "A Global Bayesian Optimization Algorithm and Its Application to Integrated System Design." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 4, 2018, pp. 792-802, https://doi.org/10.1109/TVLSI.2017.2784783.

Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.