CStream: Parallel Data Stream Compression on Multicore Edge Devices

In the burgeoning realm of Internet of Things (IoT) applications on edge devices, data stream compression has become increasingly pertinent. The integration of added compression overhead and limited hardware resources on these devices calls for a nuanced software-hardware co-design. This paper intro...

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Veröffentlicht in:IEEE transactions on knowledge and data engineering Jg. 36; H. 11; S. 5889 - 5904
Hauptverfasser: Zeng, Xianzhi, Zhang, Shuhao
Format: Journal Article
Sprache:Englisch
Veröffentlicht: IEEE 01.11.2024
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ISSN:1041-4347, 1558-2191
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Zusammenfassung:In the burgeoning realm of Internet of Things (IoT) applications on edge devices, data stream compression has become increasingly pertinent. The integration of added compression overhead and limited hardware resources on these devices calls for a nuanced software-hardware co-design. This paper introduces CStream , a pioneering framework crafted for parallelizing stream compression on multicore edge devices. CStream grapples with the distinct challenges of delivering a high compression ratio, high throughput, low latency, and low energy consumption. Notably, CStream distinguishes itself by accommodating an array of stream compression algorithms, a variety of hardware architectures and configurations, and an innovative set of parallelization strategies, some of which are proposed herein for the first time. Our evaluation showcases the efficacy of a thoughtful co-design involving a lossy compression algorithm, asymmetric multicore processors, and our novel, hardware-conscious parallelization strategies. This approach achieves a <inline-formula><tex-math notation="LaTeX">2.8 \times</tex-math> <mml:math><mml:mrow><mml:mn>2</mml:mn><mml:mo>.</mml:mo><mml:mn>8</mml:mn><mml:mo>×</mml:mo></mml:mrow></mml:math><inline-graphic xlink:href="zeng-ieq1-3386862.gif"/> </inline-formula> compression ratio with only marginal information loss, <inline-formula><tex-math notation="LaTeX">4.3 \times</tex-math> <mml:math><mml:mrow><mml:mn>4</mml:mn><mml:mo>.</mml:mo><mml:mn>3</mml:mn><mml:mo>×</mml:mo></mml:mrow></mml:math><inline-graphic xlink:href="zeng-ieq2-3386862.gif"/> </inline-formula> throughput, 65% latency reduction and 89% energy consumption reduction, compared to designs lacking such strategic integration.
ISSN:1041-4347
1558-2191
DOI:10.1109/TKDE.2024.3386862