On the Design of Bayesian Storage Allocation Algorithms for Paging and Segmentation - Shemer, J.E.; Someshwar; Gupta, C. (IEEE transactions on computers, 1969)
This short note focuses attention upon techniques for dynamic memory allocation in multiprogrammed systems which employ the addressing mechanisms of paging and segmentation. Here, event indicators and mathematical tools are presented which supply characterizations of the paging and segmentation addressing processes. It is shown that these statistical characterizations form data bases which can be used to derive Bayesian storage allocation algorithms conditionally based upon usage, demand, and processing history. It is argued that these characterizations, and algorithms similar to those constructed here, provide a flexible basis for efficient memory management in multiprogrammed, and by extension, time-shared environments. Although emphasis is directed to managing primary (main) memory residence, the techniques could be extended to govern memory management for a hierarchy of storage devices.