FPGA-based Low Latency Square Root CORDIC Algorithm
The coordinate rotation digital computer (CORDIC) algorithm is a popular method used in many fields of science and technology. Unfortunately, it is a time-consuming process for central processing units (CPUs) and graphics processing units (GPUs), and even for specialized digital signal processing (D...
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| Published in: | Journal of Telecommunications and Information Technology Vol. 99; no. 1; pp. 21 - 29 |
|---|---|
| Main Authors: | , , |
| Format: | Journal Article |
| Language: | English |
| Published: |
Warsaw
Instytut Lacznosci - Panstwowy Instytut Badawczy (National Institute of Telecommunications)
2025
National Institute of Telecommunications |
| Subjects: | |
| ISSN: | 1509-4553, 1899-8852 |
| Online Access: | Get full text |
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